Gate Driving Circuit Segmentation for Display Devices
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Solution Overview
Problem
Current display devices face challenges in improving driving reliability, particularly in the design of gate driving circuits, which affect the overall performance and efficiency of gate signal output to the display panel.
Innovation Solution
The proposed display device incorporates a gate driving circuit with a stage part comprising a first and second stage group, cascade-connected branch lines, and line pattern rows, where specific electrical connections and orientations of branch lines and clock line patterns enhance signal distribution and reduce parasitic capacitance, thereby improving driving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate driving circuit uses a conventional layout with branch lines extending directly to line pattern rows, then the circuit structure is simple, but parasitic capacitance increases and driving reliability decreases
Solution Approach 1:
The branch lines are segmented into first branch lines connected to first stages and second branch lines connected to second stages, with separate first and second pattern rows. This segmentation reduces parasitic capacitance by distributing the electrical connections more effectively across the circuit layout, thereby improving driving reliability without excessive complexity increase.
Solution Approach 2:
The circuit layout transitions from a single-plane configuration to a multi-layer structure where first and second pattern rows are arranged in different directions and planes. The first pattern rows extend in a first direction while second pattern rows extend in a second direction, creating a three-dimensional arrangement that reduces parasitic capacitance between adjacent conductors.
2Productivity
If branch lines are arranged in a single direction, then the layout is simple, but signal distribution efficiency decreases due to increased parasitic capacitance
Solution Approach 1:
The first and second pattern rows are arranged asymmetrically with respect to each other, with first pattern rows extending in a first direction and second pattern rows extending in a second direction. This asymmetric arrangement optimizes signal distribution by minimizing parasitic capacitance coupling between adjacent lines while maintaining efficient electrical connectivity to all stages.
3Reliability
If the gate driving circuit stages are cascade-connected in a linear sequence, then the circuit design is straightforward, but signal output reliability decreases due to accumulated parasitic effects
Solution Approach 1:
The gate driving circuit stages are divided into two separate groups: first stages connected to first pattern rows and second stages connected to second pattern rows. This segmentation breaks the linear cascade into two parallel cascades, reducing the accumulated parasitic effects in any single signal path and improving overall gate signal output reliability.
Data Source
AI summary
Provided is a display device including a display panel and a gate driving circuit. The gate driving circuit includes a stage part including a first stage group and a second stage group cascade-connected to the first stage group, a branch line part having first branch lines electrically connected to the first stages, respectively, and second branch lines electrically connected to the second stages, respectively, line pattern rows having first pattern rows electrically connected to the first branch lines and second pattern rows electrically connected to the second branch lines, respectively, and a signal line facing the line pattern rows in the first direction. Any one second branch line among the second branch lines includes a first line portion extending in the first direction and a second line portion extending in the second direction and disposed between the signal line and the line pattern rows on a plane.