Gate Driving Circuit Segmentation for Display Panel Short-Circuit Prevention
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Solution Overview
Problem
High-resolution and high-frequency display panels face issues with abnormal black screens due to overcurrent protection caused by the short-circuiting of start signal and DC low electric potential sources in conventional gate driving circuits, particularly in the initial stages of operation.
Innovation Solution
A gate driving circuit design that cascades N GOA units with distinct structures, including pull-up, pull-down, and holding circuits, and a reset circuit, which avoids the short-circuiting by managing electric potentials and currents effectively, eliminating the need for a reset circuit in initial stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional reset circuit is used to simplify layout design by implementing start signal line and reset signal line through one signal line, then device complexity is reduced, but overcurrent protection is triggered causing abnormal black screen
Solution Approach 1:
The gate driving circuit is divided into N GOA units, with the first GOA unit having a different structure (without reset circuit) compared to the second GOA units (with reset circuit). This segmentation allows the initial stage to avoid short-circuiting while other stages benefit from reset functionality, resolving the contradiction between simplified layout and reliable operation.
Solution Approach 2:
The reset circuit is selectively applied only to specific stages (second GOA units) rather than uniformly across all stages. The first GOA unit operates without a reset circuit, creating local differentiation in circuit quality that prevents overcurrent protection triggers during initial operation while maintaining layout simplicity.
2Ease of manufacture
If the start signal line and reset signal line are implemented by one signal line, then manufacturing cost is reduced, but current short-circuiting occurs triggering overcurrent protection
Solution Approach 1:
The signal line implementation is segmented by stage: the first GOA unit uses a simplified single signal line for both start and reset functions, while second GOA units implement separate signal lines. This segmentation eliminates harmful short-circuiting currents in critical initial stages while maintaining manufacturing simplicity elsewhere.
Solution Approach 2:
The first GOA unit is designed without a reset circuit to preemptively prevent the short-circuiting condition from occurring in the initial operation phase. This preliminary anti-action against potential harmful currents allows the use of simplified single signal line implementation without triggering overcurrent protection.
3Reliability
If a reset circuit is added to each GOA unit to manage electric potentials, then circuit reliability is improved, but device complexity increases
Solution Approach 1:
Rather than adding reset circuits to all GOA units, the invention segments the application by implementing reset circuits only in second GOA units while omitting them from the first GOA unit. This selective segmentation achieves reliable electric potential management where needed without unnecessarily increasing overall device complexity.
Solution Approach 2:
The reset circuit functionality is applied partially to only those stages that require it (second GOA units), rather than excessively applying it to all stages. This partial action provides sufficient reliability for electric potential management while avoiding unnecessary complexity in the overall circuit design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents abnormal black screens by managing electric potentials and currents, ensuring reliable operation of high-resolution and high-frequency display panels by eliminating the short-circuiting issue and enhancing circuit reliability.
Implementation Method 1
the bootstrap capacitor configured to, in a second period, hold an electric potential of the control node (Qn) of the nth-stage GOA unit at the first high electric potential
Data Source
AI summary
A gate driving circuit and a display panel are provided. The gate driving circuit includes N gate driver on array (GOA) units, wherein the N GOA units are cascaded. An nth-stage GOA unit is any one of the N GOA units. The N GOA units include at least one first GOA unit and at least one second GOA unit. Each first GOA unit and each second GOA unit include pull-up control circuits, bootstrap capacitors, pull-up circuits, pull-down circuits, and pull-down holding circuits. Each second GOA unit further includes a reset circuit.