Gate Driving Circuit Shift Register Reset Mechanism
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Solution Overview
Problem
In display devices, the output terminals of shift registers in gate driving circuits often float to high voltage levels during scanning, degrading display performance by causing screen jitter and affecting image quality.
Innovation Solution
A gate driving circuit design where each stage of shift registers is reset before scanning, with the n-th stage being reset by the output signal from the (n−i)-th stage, ensuring all stages are maintained at a low voltage level before scanning, thereby preventing floating voltage levels and improving image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shift registers are scanned sequentially to provide gate driving signals, then the gate driving circuit can operate the TFT array substrate, but the output terminals float to high voltage levels causing screen jitter and degraded display performance
Solution Approach 1:
The patent applies preliminary action by resetting the shift registers to low voltage levels before the scanning operation begins. The reset signal is applied in advance to all shift register stages, ensuring they start in a known stable state rather than allowing them to float to unpredictable high voltage levels during scanning.
Solution Approach 2:
The patent implements feedback by using the output signal from each shift register stage to control the reset operation of subsequent stages. Specifically, the output of stage n-i is fed back to trigger the reset of stage n, creating a controlled cascade reset mechanism that prevents floating voltage levels.
2Reliability
If reset signals are applied to all shift register stages simultaneously, then all stages can be reset before scanning, but the circuit complexity increases with additional reset signal lines
Solution Approach 1:
The patent applies segmentation by dividing the reset operation into staged segments rather than a single simultaneous operation. Different groups of shift register stages are reset at different times based on their position in the cascade, with stages 1 to i reset by a first reset signal and stages i+1 to m reset by output signals from earlier stages.
Solution Approach 2:
The patent implements self-service by enabling later shift register stages to reset themselves using the output signals from earlier stages. The output signal from stage n-i automatically triggers the reset of stage n, eliminating the need for external reset signal lines to reach every stage and reducing overall circuit complexity.
Data Source
AI summary
A gate driving circuit is disclosed. The gate driving circuit includes m stages of shift registers, where each stage of shift register includes a first reset terminal, a first input terminal, and an output terminal. A first input terminal of the first stage of shift register is configured to receive an initial signal, and a first reset terminal of the first stage of shift register is configured to receive a reset signal. In addition, first reset terminals of the second to i-th stages of shift registers are configured to receive first signals, where a first reset terminal of each stage of shift register is electrically connected to an output terminal of the previous stage of shift register to receive an output signal from the previous stage of shift register, such that the output signal from the previous stage of shift register causes the next stage of shift register to reset.