Gate Driving Circuit Stabilization via Periodic Voltage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Transistors in gate driving circuits of display devices deteriorate due to continuously applied voltage, affecting the performance and longevity of the display device.
Innovation Solution
A display device with a gate driving circuit that includes stages with a clock signal swinging between different voltages during frame intervals and stabilization intervals, featuring a control unit and pull-down units to manage the voltage of the Q-node and output signals, thereby compensating for transistor deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuously applied voltage is used to drive the gate driving circuit during frame intervals, then the display device can maintain normal display operation, but the transistors deteriorate over time reducing reliability
Solution Approach 1:
The patent applies periodic action by introducing a stabilization interval between frame intervals where the clock signal voltage is reduced to a lower voltage level. This periodic voltage reduction allows transistors to recover from deterioration caused by continuous high-voltage operation, while still maintaining display functionality during the normal frame intervals. The gate driving circuit alternates between normal operation mode (frame interval) and stabilization mode (stabilization interval), creating a periodic cycle that prevents cumulative transistor damage.
2Reliability
If the clock signal voltage is reduced during stabilization interval, then transistor deterioration is compensated, but the display device cannot display images during this interval
Solution Approach 1:
The patent implements the discarding and recovering principle by temporarily discarding display output during the stabilization interval to allow transistor recovery. The blank image displayed during this interval represents the discarded display function, while the transistor performance is recovered through reduced voltage stress. This temporary sacrifice of display productivity during the stabilization interval enables long-term maintenance of reliable operation by preventing cumulative transistor deterioration.
Data Source
AI summary
A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.