Gate Driving Circuit Leakage Reduction via Stage Segmentation
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Solution Overview
Problem
Existing display devices face issues with defective gate driving circuits, which affect the reliability and efficiency of gate signal output to gate lines, leading to potential display performance degradation.
Innovation Solution
A display device with a gate driving circuit that includes multiple driving stages, each comprising an output transistor, control transistors, and a capacitor to boost voltage, ensuring reliable gate signal output and reduced leakage current through optimized transistor configurations and timing control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate driving circuit is used, then the device structure is simple, but the leakage current increases and reliability deteriorates
Solution Approach 1:
The gate driving circuit is divided into multiple driving stages (first driving stage, second driving stage, third driving stage, etc.), each responsible for driving a specific gate line. This segmentation allows independent optimization of each stage to reduce leakage current while maintaining overall circuit functionality.
Solution Approach 2:
Before the output transistor turns off, the control transistor is turned on in advance to discharge the node voltage through the discharge transistor. This preliminary action prevents voltage accumulation and reduces leakage current, improving reliability without requiring complex additional components.
Solution Approach 3:
The circuit uses its own control signals to manage the discharge process. The control transistor is activated by the same clock signal that drives the output transistor, allowing the circuit to self-regulate its discharge mechanism without external intervention or additional complex control logic.
2Productivity
If the gate driving circuit operates continuously, then productivity is maintained, but leakage current increases and energy is lost
Solution Approach 1:
The gate driving circuit operates in periodic cycles, with each driving stage alternating between active signal output and discharge phases. The control transistor is activated periodically to discharge accumulated charges, creating a rhythm of operation that maintains productivity while minimizing continuous energy loss through leakage current.
Solution Approach 2:
While the discharge operation occurs periodically, the gate driving function continues without interruption. The seamless transition between signal output and discharge phases ensures continuous useful action is maintained, preventing any breakdown in gate line driving while managing energy loss through controlled discharge events.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enhances the reliability and efficiency of gate signal output, reducing leakage current and maintaining voltage levels, thereby improving display performance and reducing defects in the gate driving circuit.
Implementation Method 1
a capacitor configured to boost a voltage of the first node after the activation signal is provided to the first node
Data Source
AI summary
A display device includes: a display panel; and a gate driving circuit, a kth driving stage from among driving stages for outputting a kth gate signal from among gate signals, where k is a natural number of two or more, including: at least one output transistor including a control electrode connected to a first node, an input electrode to receive a clock signal, and an output electrode to output an output signal; a first control transistor to output an activation signal to the first node before the kth gate signal is outputted; a capacitor to boost a voltage of the first node after the activation signal is provided to the first node; second and third control transistors connected in series between the first node and a voltage input terminal; and a first intermediate node between the second control transistor and the third control transistor for receiving the output signal.


