Gate Driving Circuit for Insulated-Gate Switching Devices

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Solution Overview

Problem

Conventional semiconductor devices struggle to integrate high-speed switching capabilities due to heat generation issues, requiring separate devices for low-speed and high-speed switching, which leads to increased circuit size and inefficiency.

Innovation Solution

A semiconductor device that can perform both low-speed and high-speed switching by using a single circuit structure with an optional inverting circuit for high-speed operations, allowing sharing of the device between different switching applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a gate driving circuit is designed for high-speed switching, then the switching speed is improved, but the gate current increases causing heat generation and requiring high ampacity

Engineering Contradiction:
Improveswitching speedVSAvoidheat generation
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The patent implements dynamic operation mode switching between first operation mode (for low-speed switching) and second operation mode (for high-speed switching). The control circuit dynamically selects the appropriate operation mode based on the switching speed requirements, allowing the gate driving circuit to adapt its characteristics to match the operational demands without continuously operating in high-current mode that generates excessive heat.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes operational parameters by switching between two distinct operation modes. In the first operation mode, the circuit operates with parameters suitable for low-speed switching (lower gate current, reduced heat generation). In the second operation mode, the circuit operates with parameters optimized for high-speed switching (higher gate current, high ampacity). This parameter switching resolves the contradiction by allowing the system to exhibit different electrical characteristics depending on the required switching speed.

Inventive Principle:
Principle #35Parameter changes

2Temperature

If a semiconductor device is designed for low-speed switching, then heat generation is reduced, but the switching speed decreases

Engineering Contradiction:
Improveheat generationVSAvoidswitching speed
Core Design Contradiction:
TemperatureVSSpeed

Solution Approach 1:

The patent implements dynamic operation mode switching between first operation mode (for low-speed switching) and second operation mode (for high-speed switching). The control circuit dynamically selects the appropriate operation mode based on the switching speed requirements, allowing the gate driving circuit to adapt its characteristics to match the operational demands without continuously operating in high-current mode that generates excessive heat.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes operational parameters by switching between two distinct operation modes. In the first operation mode, the circuit operates with parameters suitable for low-speed switching (lower gate current, reduced heat generation). In the second operation mode, the circuit operates with parameters optimized for high-speed switching (higher gate current, high ampacity). This parameter switching resolves the contradiction by allowing the system to exhibit different electrical characteristics depending on the required switching speed.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If separate semiconductor devices are used for low-speed and high-speed switching, then each device can be optimized for its specific function, but the circuit size increases and device sharing becomes impossible

Engineering Contradiction:
Improvedevice optimizationVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal gate driving circuit that can perform both low-speed switching (first operation mode) and high-speed switching (second operation mode) functions using the same semiconductor device. The control circuit includes switching means that enables the single device to operate in different modes depending on the application requirements, eliminating the need for separate dedicated devices for each switching speed while maintaining optimal performance for both functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functionality of separate low-speed switching device and high-speed switching device into a single integrated gate driving circuit. By combining multiple operation modes within one device and providing switching means to select between modes, the patent reduces circuit complexity and enables device sharing while preserving the optimization benefits of having specialized circuits for different switching speeds.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2712087B1Semiconductor device and circuit for controlling electric potential of gate of insulated-gate type switching element
Publication Date: 2018.09.19 TOYOTA JIDOSHA KK
  • EP2712087B1 patent drawingFigure 1
  • EP2712087B1 patent drawingFigure 2
  • EP2712087B1 patent drawingFigure 3

AI summary

A semiconductor device outputs a signal to control a potential of a gate of an insulated gate type switching device. The semiconductor device includes a first signal output terminal, and is capable of receiving a reference signal or internally creating the reference signal, which is configured to vary between a first potential and a second potential higher than the first potential. The semiconductor device is capable of switching between a first operation and a second operation. The first operation outputs to the first signal output terminal a signal that is at a third potential when the reference signal is at the first potential, and that is at a fourth potential higher than the third potential when the reference signal is at the second potential. The second operation outputs to the first signal output terminal a signal that is at the fourth potential when the reference signal is at the first potential, and that is at the third potential when the reference signal is at the second potential.