Gate Driving Circuit for Semiconductor Switching Surge Control
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Solution Overview
Problem
Conventional driving methods for semiconductor elements struggle to balance turn-off loss and surge voltage, especially as switching speed increases, due to the influence of main circuit wiring inductance, making it difficult to improve the trade-off between these factors.
Innovation Solution
A driving apparatus that includes a gate driving circuit, a timing generating circuit, and a driving condition change circuit to generate and adjust timing signals based on reference voltages, reducing the speed of gate charge changes in semiconductor elements during turn-off periods, thereby optimizing turn-off loss and surge voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the switching speed of the semiconductor element is increased, then the productivity is improved, but the surge voltage increases due to main circuit wiring inductance
Solution Approach 1:
The gate driving circuit performs preliminary action by pre-charging the gate capacitance before the semiconductor element is fully turned on, and by controlling the gate voltage waveform shape in advance to reduce di/dt during turn-off, thereby preventing surge voltage generation while maintaining high switching speed
Solution Approach 2:
The gate driving circuit dynamically adjusts the gate voltage waveform characteristics based on operating conditions, changing the charging and discharging rates of gate capacitance to optimize the balance between switching speed and surge voltage suppression in real-time
2Productivity
If the gate charge changes rapidly to improve switching speed, then the productivity is improved, but the turn-off loss increases
Solution Approach 1:
The gate driving circuit uses dynamic control with different charging/discharging rates for gate capacitance - fast charging during turn-on to reduce turn-on loss, and controlled discharging during turn-off to balance switching speed and turn-off loss, achieving optimal performance in both directions
Data Source
AI summary
A driving apparatus including: gate driving circuit to drive gates of a first semiconductor element and a second semiconductor element connected in series between a positive side power supply line and a negative side power supply line; a first timing generating circuit to generate a first timing signal when voltage applied to the second semiconductor element becomes reference voltage during a turn-off period of the first semiconductor element; and a first driving condition change circuit, wherein the gate driving circuit relaxes change in a charge amount of the gate of the first semiconductor element, according to the first timing signal.