Gate Driving Circuit Bezel Reduction via Transistor Extraction
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Solution Overview
Problem
The existing gate driving circuits in liquid crystal displays face challenges in reducing bezel size and power consumption due to the limitations of semiconductor materials like amorphous silicon and polysilicon, which affect the performance and manufacturing costs of thin film transistors.
Innovation Solution
A gate driving circuit design that omits the output pull-down transistor, incorporating a dual structure with a control node pull-up part and a control node pull-down part, utilizing oxide semiconductors to enhance charge mobility and reduce transistor count, thereby minimizing bezel size and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an output pull-down transistor is included in the gate driving circuit, then the circuit can fully discharge the output node, but the transistor count increases leading to larger bezel size
Solution Approach 1:
The patent extracts and removes the output pull-down transistor from the gate driving circuit. By analyzing the discharge paths and timing, the invention demonstrates that the dedicated output pull-down transistor is redundant because other transistors in the circuit can perform the discharge function during specific time periods, thereby reducing transistor count and bezel size while maintaining proper discharge capability
Solution Approach 2:
The patent makes other transistors in the circuit serve multiple functions. Specifically, transistors that are part of the normal signal transmission path are made to also function as pull-down transistors during specific periods, eliminating the need for a dedicated output pull-down transistor and reducing the overall circuit area
2Reliability
If more transistors are used in the gate driving circuit, then the circuit can maintain proper signal levels, but power consumption increases
Solution Approach 1:
The patent removes the output pull-down transistor which was consuming power continuously or during discharge cycles. By eliminating this redundant component, the total power consumption of the gate driving circuit is reduced while signal level control is maintained through alternative discharge paths using existing transistors
Solution Approach 2:
The patent implements periodic discharge action where transistors are activated at specific times to pull down the output node voltage. Instead of having a continuously active pull-down transistor, the discharge function is performed periodically by other transistors in the circuit, reducing overall power consumption while maintaining signal integrity
Data Source
AI summary
A gate driving circuit including a plurality of stage circuits to output a plurality of gate signals, a N-th stage circuit of the plurality of stage circuits includes: an output pull-up part including a control electrode connected to a first node, the first node being configured to have a potential increase in response to a (N−1)-th control signal received from a previous stage circuit of the N-th stage circuit, the output pull-up part to receive a clock signal to output a gate signal of the N-th stage circuit; a control node pull-up part to control the potential of the first node by using the (N−1)-th control signal; and a control node pull-down part to discharge the first node to a second low voltage according to a (N+1)-th control signal, wherein the output pull-up part is to discharge the gate signal of the N-th stage circuit in a (N+2)-th stage circuit.