Gate Driving Circuit Transistor Layout for Display Panels
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Solution Overview
Problem
Existing gate driving circuits in display panels occupy excessive longitudinal dimensions due to the increased number of stages in Tri-Gate and DLS driving architectures, leading to space constraints for other devices.
Innovation Solution
The proposed display panel incorporates a gate driving circuit with N GOA units arranged in cascade along a first direction, where each GOA unit includes a first and second driving transistor disposed adjacently along a second direction. The first and second sources of these transistors are connected to a common control node and overlap partially in the second direction, reducing the longitudinal dimensions of the transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If Tri-Gate or DLS driving architecture is used in gate driving circuit, then cost is reduced, but longitudinal dimension of the gate driving circuit becomes too large
Solution Approach 1:
The patent merges the source regions of adjacent driving transistors within the same GOA unit by making them overlap in the second direction. This consolidation reduces the total longitudinal space required for the gate driving circuit while maintaining the functionality of Tri-Gate or DLS driving architecture, thus resolving the contradiction between cost reduction and excessive longitudinal dimension.
Solution Approach 2:
The patent utilizes the second direction (transverse direction) to arrange overlapping source regions of adjacent transistors. By extending the layout in the transverse direction through overlapping, the longitudinal dimension is reduced while maintaining transistor functionality, effectively resolving the space constraint issue.
2Power
If the number of stages of GOA units is increased, then driving capability is improved, but longitudinal dimension of the gate driving circuit becomes too large
Solution Approach 1:
The patent combines adjacent source regions of driving transistors within each GOA unit by making them overlap in the second direction. This merging approach allows multiple stages of GOA units to be arranged more compactly in the longitudinal direction, enabling increased driving capability through additional stages without proportionally increasing the longitudinal dimension.
Solution Approach 2:
The patent redistributes transistor layout by utilizing the second direction for overlapping source regions. This dimensional rearrangement allows more GOA units to be stacked in the longitudinal direction, thereby improving driving capability while controlling the overall longitudinal footprint of the gate driving circuit.
Data Source
AI summary
A display panel and a mobile terminal are disclosed. The display panel includes a gate driving circuit, the gate driving circuit includes a first driving transistor and a second driving transistor disposed along a second direction, the first driving transistor includes a first source and a first drain, the second driving transistor includes a second source and a second drain, the first source and the second source are connected to a same control node. The first source, the first drain, the second source and the second drain are disposed side by side along the first direction, the first source and the second source are disposed between the first drain and the second drain, and the first source and the second source at least partially overlap in the second direction.