Gate Driving Circuit Compensation for In-Cell Touch Display Signal Integrity
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Solution Overview
Problem
In in-cell touch display panels, the integration of touch functionality into the display pixels leads to degraded display quality due to suspended or paused clock signals in shift registers during touch sensing periods, causing improper extension of rising and falling edges of gate driving signals.
Innovation Solution
A gate driving circuit with shift registers divided into groups and compensation circuits between them, enabling signal holding and pre-charging, prevents the rising and falling edges of gate driving signals from being affected by touch sensing periods, ensuring consistent signal delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If clock signals are suspended or paused during touch sensing periods in in-cell touch display panels, then touch detection can be performed, but the rising edges or falling edges of gate driving signals are improperly extended and display quality is degraded
Solution Approach 1:
The shift registers are divided into multiple groups (first group, second group, third group, etc.) that can be independently controlled. During touch sensing periods, only specific groups are suspended while others continue operating, allowing touch detection without completely stopping the gate driving circuit and preventing display quality degradation.
Solution Approach 2:
The compensation circuit performs pre-charging of the clock signal before the actual touch sensing period begins. This preliminary action ensures that when the clock signal is suspended, the shift register is already in a prepared state that prevents improper extension of signal edges, thereby maintaining display quality during touch detection.
2Reliability
If clock signals are continuously provided to shift registers, then gate driving signals are generated without interruption, but touch sensing cannot be performed during display periods
Solution Approach 1:
The gate driving circuit operates in periodic cycles, alternating between display periods (where clock signals are continuously provided) and touch sensing periods (where specific shift register groups are suspended). This periodic switching allows both continuous gate driving and touch sensing to be achieved through time-division multiplexing.
Solution Approach 2:
The system dynamically adjusts the operation state of different shift register groups based on the current period type. During touch sensing periods, the compensation circuit dynamically controls which groups are suspended and which continue operating, enabling flexible adaptation between display and touch functions without compromising signal continuity.
3Reliability
If shift registers are divided into groups with compensation circuits, then signal holding and pre-charging can be implemented, but device complexity increases
Solution Approach 1:
A compensation circuit is introduced as an intermediary component between the clock signal source and the divided shift register groups. This compensation circuit implements signal holding and pre-charging functions, ensuring precise signal edges during touch sensing periods while managing the complexity through a dedicated intermediate layer that simplifies the overall control logic.
Data Source
AI summary
A gate driving circuit includes a plurality of shift registers arranged to output the gate driving signals in sequence. The shift registers are divided into groups arranged in sequence, wherein the driving signal from a first one of a N+1th group of shift registers is next to the driving signal from a first one of a Nth group of shift registers; and at least one first compensation circuit connected to the last one of the Nth group of shift registers and the first one of the N+1th group of shift registers, wherein the first compensation circuit provides a first control signal to enable the last one of the Nth group of shift registers to perform signal holding, and provides a second control signal to enable the first one of the N+1th group of shift registers to perform pre-charging, wherein N is an integer greater than zero.