Gate Driving Circuit With Integrated Clock Signaling to Reduce Loads
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Solution Overview
Problem
Existing display apparatuses face high power consumption due to undesired burdens on driving signals, particularly in the form of line loads and driving loads, which are not effectively managed in current technologies.
Innovation Solution
The integration of driving signals, such as a clock signal, into a single integrated signal and the division of the display panel into distinct areas with staggered toggling and direct current (DC) states for clock signals, reducing load values and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If multiple driving signals are transmitted separately to different display areas, then each area can be driven independently, but the line load and driving load increase, causing high power consumption
Solution Approach 1:
The patent combines multiple driving signals into a single integrated clock signal that is transmitted through a shared clock signal line. The clock signal contains embedded control information that allows the gate driver to generate different scan signals for different display areas, thereby reducing the number of separate signal lines and lowering power consumption while maintaining independent driving capability.
Solution Approach 2:
The clock signal line serves multiple functions by transmitting a universal clock signal that can be differentiated into area-specific driving signals. The embedded control information within the clock signal enables a single signal line to control multiple display areas independently, reducing the overall complexity of the signal transmission system.
2Productivity
If clock signals are continuously toggled for all display areas, then all areas can be driven simultaneously, but the driving load increases unnecessarily
Solution Approach 1:
The patent segments the display panel into multiple display areas and implements staggered toggling of the clock signal for each area. Different groups of stages receive clock signals with different toggling patterns, allowing simultaneous driving of multiple areas while reducing the overall driving load by avoiding uniform continuous toggling across all areas.
Solution Approach 2:
The clock signal employs periodic toggling patterns with different phases for different display areas. By implementing staggered periodic action where odd and even groups of stages toggle at different times, the system maintains productive simultaneous driving while reducing peak power consumption and driving load through temporal distribution of the toggling burden.
Data Source
AI summary
In one or more examples, a display apparatus includes a display panel configured to display an image and a gate driver connected to gate lines of the display panel and configured to output a scan signal which is to be applied to the gate lines, based on a clock signal. The clock signal includes a toggling omission time. A gate driving circuit is also disclosed.