Multi-Stage Gate Driving Circuit for High-Temperature Noise Reduction
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Solution Overview
Problem
Amorphous silicon gate (ASG) technology for display devices generates noise due to high gate driving part temperatures during long driving periods, which degrades display quality and has not been effectively controlled by existing structures.
Innovation Solution
A gate driving circuit with multiple stages, including pull-up, pull-down, and holding parts, that applies negative voltage to the pull-up part to reduce leakage current and uses a compensation charging part to increase discharge time, thereby minimizing noise and preventing damage from high temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon gate (ASG) technology is used to reduce manufacturing costs and panel size, then manufacturing cost and total panel size are reduced, but noise is generated due to high gate driving part temperature during long driving periods
Solution Approach 1:
The gate driving circuit is divided into multiple stages (first stage, second stage, third stage, etc.), with each stage independently controlling a gate line. This segmentation allows noise from individual stages to be isolated and controlled, preventing cumulative noise effects during long driving periods while maintaining the cost-effective ASG architecture.
Solution Approach 2:
The patent applies different voltage parameters to different parts of the circuit. Specifically, a first voltage (e.g., -10V to -30V) is applied to the first holding part and a second voltage (e.g., -5V to -15V) to the second holding part. This parameter differentiation optimizes noise characteristics by ensuring proper discharge timing and preventing overlapping signals that cause noise, while maintaining the low-cost ASG structure.
2Productivity
If the gate driving circuit operates for long periods, then productivity is maintained, but the gate driving part temperature increases causing noise that degrades display quality
Solution Approach 1:
The holding parts are designed to discharge capacitor voltages in advance before the clock signal transitions. The first holding part discharges the first capacitor to the first low voltage level, and the second holding part discharges the second capacitor to the second low voltage level, ensuring that noise-causing voltage overlaps are prevented before they occur during long driving periods.
Solution Approach 2:
The circuit uses feedback mechanisms where the output of each stage feeds into the next stage's control. The carry signal from one stage controls the discharge timing of the next stage's holding parts, creating a feedback loop that maintains proper voltage levels and prevents noise accumulation during extended operation.
3Object-affected harmful factors
If various maintenance parts are added to minimize noise during non-driven periods, then noise control during idle time is improved, but device complexity increases and long-term high temperature noise control remains ineffective
Solution Approach 1:
The patent merges the noise control function into the existing multi-stage circuit structure itself. The holding parts are integrated within each stage to control discharge timing, eliminating the need for separate maintenance circuits. This unified approach reduces overall complexity while effectively controlling noise during both driven and non-driven periods, and addresses high-temperature noise issues.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces gate driving circuit noise at high temperatures and prevents damage from long driving durations, improving the reliability and quality of the display device.
Implementation Method 1
The pull-up part outputs a high voltage of a clock signal as a high voltage of an m-th gate signal in response to a high voltage received from a first output control part
Implementation Method 2
The pull-down part pulls down the high voltage of the m-th gate signal to a first low voltage in response to a high voltage of an (m+1)-th gate signal
Implementation Method 3
The first holding part holds a voltage received from the first output control part as a second low voltage having a level lower than the first low voltage in response to a high voltage of the clock signal
Implementation Method 4
The second holding part holds a low voltage of the m-th gate signal to the first low voltage in response to a high voltage of the clock signal
Data Source
AI summary
A gate driving circuit includes a plurality of stages connected to each other. An m-th stage (‘m’ is a natural number) of the stages includes a pull-up part, a pull-down part, a first holding part and a second holding part. The pull-up part outputs a high voltage of a clock signal as a high voltage of an m-th gate signal in response to a high voltage applied to a first output control part. The pull-down part pulls down the high voltage of the m-th gate signal to a first low voltage in response to a high voltage of an (m+1)-th gate signal. The first holding part holds a voltage applied to the first output control part as a second low voltage having a level lower than the first low voltage. The second holding part holds a low voltage of the m-th gate signal to the first low voltage.