Gate Driving Circuit Phase Control for Stable High-Temperature Scan Pulses
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Solution Overview
Problem
N-type oxide semiconductor transistors in shift registers experience increased leakage current at high temperatures, leading to unstable output due to negative shift in threshold voltage, which affects the generation of scan pulses in display devices.
Innovation Solution
A gate driving circuit is designed with a first clock generator producing n output control clock pulses and a second clock generator producing m*n output clock pulses with different phases, ensuring the rising edge of each output clock pulse aligns with the high period of the corresponding output control clock pulse, and includes a shift register with specific switching devices to manage voltage and discharging to prevent current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional oxide semiconductor transistors are used in shift registers, then the circuit structure is simple, but leakage current increases at high temperatures due to negative threshold voltage shift
Solution Approach 1:
The shift register is divided into multiple stages, with each stage containing separate switching devices for charging and discharging the set node. This segmentation allows independent control of charge and discharge operations, enabling precise management of the set node voltage and preventing leakage current issues without increasing overall circuit complexity
Solution Approach 2:
The switching devices are configured to perform preliminary charging of the set node before the output period begins. By pre-charging the set node to a predetermined voltage level, the circuit ensures that the transistor remains properly biased and prevents threshold voltage shift-induced leakage during the output period
2Ease of operation
If the threshold voltage of oxide semiconductor transistors is not controlled, then the transistor can be turned off easily, but leakage current occurs at high temperatures causing output voltage to fall
Solution Approach 1:
The circuit employs feedback mechanisms where the state of the set node influences the operation of subsequent stages. The charge stored at the set node is maintained through controlled discharge paths, creating a feedback loop that ensures stable output voltage by continuously monitoring and adjusting the charge state based on threshold voltage conditions
Solution Approach 2:
The invention changes the voltage parameter at the set node by implementing a predetermined voltage level that compensates for threshold voltage shifts. By adjusting the set node voltage to account for temperature-induced threshold changes, the circuit maintains reliable transistor switching and prevents leakage current while ensuring stable output voltage
Data Source
AI summary
A gate driving circuit includes a first clock generator to output n output control clock pulses having different phases; a second clock generator to create m*n output clock pulses having different phases and partially overlapped with one another in high periods thereof, to arrange the m*n output clock pulses in sequence of phase, to bind the m*n output clock pulses arranged in sequence of phase in units of n to generate m groups, each of which has n output clock pulses, and to output the m*n output clock pulses so that a rising edge of an output clock pulse having a k-th sequence of phase included in each group is located in a high period of an output control clock pulse having a k-th sequence of phase among the n output control clock pulses; and a shift register sequentially outputting a plurality of scan pulses.