Gate Driving Circuit Reduces Shift Register Area for Narrow Frame Displays
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Solution Overview
Problem
The existing gate driving circuits for Thin Film Field Effect Transistor (TFT) display panels require a large number of shift register units, occupying over 40% of the area, making it difficult to achieve a narrow frame design due to the extensive wiring space needed.
Innovation Solution
A gate driving circuit is designed where one shift register unit controls two gate lines, reducing the number of shift register units and thereby minimizing wiring space through the use of logic circuits and enable circuits that convert clock signals into pulse signals to drive adjacent gate lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If one shift register unit controls only one gate line, then the gate driving function is reliable, but the number of shift register units increases, occupying over 40% of the area and making narrow frame design difficult
Solution Approach 1:
The patent applies multi-functionality by enabling a single shift register unit to control two gate lines simultaneously. The shift register unit generates scan signals that are distributed to multiple gate lines through enable circuits, allowing one unit to perform the function previously requiring two units, thereby reducing the overall VSR area while maintaining reliable gate driving functionality
Solution Approach 2:
The patent merges the control of multiple gate lines into a single shift register unit. By combining the scan signal generation and distribution functions, the design integrates what were previously separate control paths into a unified structure, reducing the number of required shift register units and their associated wiring space
2Area of stationary object
If the number of shift register units is reduced, then the wiring space decreases enabling narrow frame design, but the complexity of control signals increases
Solution Approach 1:
The patent introduces enable circuits as intermediary components between the reduced number of shift register units and the multiple gate lines. These enable circuits act as mediators that receive scan signals from shift register units and conditionally distribute them to appropriate gate lines based on control signals, thereby managing the complexity of controlling multiple gate lines with fewer shift register units
Solution Approach 2:
The patent segments the control function by separating the scan signal generation (performed by shift register units) from the gate line selection and activation (performed by enable circuits). This segmentation allows the system to reduce the number of shift register units while using enable circuits to manage the distribution of signals to multiple gate lines, balancing area reduction with controlled complexity
Data Source
AI summary
The present invention discloses a gate driving circuit and a display device having the same. The gate driving circuit includes a logic circuit, a plurality of shift register units and enable circuits. The logic circuit is configured to receive a first clock signal, a second clock signal, a third clock signal, and a fourth signal, and output a logic pulse signal for driving the plurality of shift register units and enable circuits. Each of the plurality of enable circuits is connected with one of the plurality of shift register units and configured to receive a first pulse signal outputted by one of the plurality of shift register units and the logic pulse signal outputted by the logic circuit, and output two second pulse signals to drive two respective gate lines.