Gate Driving Circuit Shift Register Pull-Down Mechanism
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Solution Overview
Problem
The existing gate driving circuits for liquid crystal displays face reliability and lifetime issues due to the wide channel width of transistors required for efficient pull-down of gate signals, leading to greater threshold voltage drift.
Innovation Solution
The proposed gate driving circuit incorporates alternating and auxiliary pull-down mechanisms, where each shift register stage includes a pull-up unit, input unit, energy-store unit, discharging unit, and a pull-down module with multiple transistors, allowing for reduced channel widths while maintaining efficient pull-down efficiency through alternating and auxiliary pull-down operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel width of the transistor in the pull-down unit is increased to efficiently pull down the gate signal, then the pull-down efficiency is improved, but the threshold voltage drift increases and reliability deteriorates
Solution Approach 1:
The pull-down function is divided into two separate transistors (first pull-down transistor and second pull-down transistor) instead of using a single transistor. Each transistor has a smaller channel width and contributes to the overall pull-down operation in sequence, thereby maintaining pull-down efficiency while reducing threshold voltage drift in each individual transistor.
Solution Approach 2:
The two pull-down transistors operate in an alternating periodic manner, where one transistor performs the pull-down operation while the other is in a non-conductive state, and then they switch roles. This periodic operation allows each transistor to work with a smaller channel width while collectively achieving the required pull-down efficiency.
2Reliability
If the channel width of the transistor is reduced to decrease threshold voltage drift, then the reliability is improved, but the pull-down efficiency deteriorates
Solution Approach 1:
The pull-down function is segmented into two transistors operating in sequence, where each transistor with reduced channel width performs a portion of the total pull-down task, thereby maintaining overall pull-down efficiency while each transistor operates with smaller channel width for reduced threshold voltage drift.
Solution Approach 2:
The pull-down capabilities of two transistors with smaller channel widths are combined through alternating operation to achieve the equivalent or superior pull-down efficiency of a single transistor with larger channel width, while simultaneously reducing threshold voltage drift.
3Device complexity
If a single pull-down transistor is used with fixed channel length, then the device complexity is reduced, but the reliability and lifetime are compromised due to threshold voltage drift
Solution Approach 1:
The single pull-down transistor is segmented into two transistors with alternating operation, where each transistor has fixed channel length but smaller channel width. This segmentation reduces threshold voltage drift in each transistor while maintaining the overall pull-down function, thereby improving reliability and circuit lifetime.
Data Source
AI summary
A high-reliability gate driving circuit includes a plurality of odd shift register stages and a plurality of even shift register stages. Each odd shift register stage generates a corresponding gate signal furnished to a corresponding odd gate line according to a first clock and a second clock having a phase opposite to the first clock, and further functions to pull down a gate signal of at least one even gate line or at least one odd gate line different from the corresponding odd gate line. Each even shift register stage generates a corresponding gate signal furnished to a corresponding even gate line according to a third clock and a fourth clock having a phase opposite to the third clock, and further functions to pull down a gate signal of at least one odd gate line or at least one even gate line different from the corresponding even gate line.


