Gate Driving Circuit with Undercut Line for Stable Transparent Displays
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Solution Overview
Problem
The manufacturing of transparent display apparatuses in various sizes and types leads to increased costs and energy consumption due to the complexity of the manufacturing process, and there is a risk of abnormal operations in the gate driving circuit.
Innovation Solution
A gate driving circuit with a low area structure is designed by reducing thin film transistors and signal lines, incorporating a dummy area with an undercut line to prevent abnormal operations and allow for manufacturing in multiple types or sizes, and a transparent display apparatus comprising the same.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate driving circuit is designed with a conventional structure to ensure reliable operation, then the circuit stability is improved, but the area occupied by the circuit increases
Solution Approach 1:
The patent extracts and removes unnecessary dummy stage circuits from the gate driving circuit configuration. By eliminating these redundant circuits, the total area occupied by the gate driving circuit is reduced while maintaining the reliability of the remaining functional stages. The circuit stability is preserved through proper design of the essential stages without the burden of additional dummy circuits.
Solution Approach 2:
Instead of adding dummy stage circuits to ensure proper operation (conventional approach), the patent inverts the approach by removing unnecessary circuits and relying on the optimized design of the remaining stages. This inversion leads to a more compact circuit area while maintaining operational reliability through careful design of the essential circuit components.
2Reliability
If multiple dummy stage circuits are added to prevent abnormal operations, then the circuit reliability is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent extracts and eliminates the need for multiple dummy stage circuits by optimizing the design of the functional stages. This reduction in circuit components directly decreases manufacturing complexity while maintaining operation stability through the optimized design of the remaining essential stages.
3Adaptability or versatility
If the gate driving circuit is designed to support multiple display panel sizes, then the adaptability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent designs the gate driving circuit with a universal structure that can accommodate multiple display panel sizes. By creating a standardized circuit design that can be scaled and adapted to different panel dimensions, the manufacturing process becomes more efficient and cost-effective. The reduced circuit area and eliminated dummy stages contribute to lower manufacturing costs while maintaining the ability to support various panel sizes.
4Productivity
If the circuit area is reduced by removing components, then the manufacturing efficiency is improved, but the circuit reliability may deteriorate
Solution Approach 1:
The patent carefully extracts and removes only the unnecessary dummy stage circuits while preserving all essential functional components. This selective removal improves manufacturing efficiency by reducing the total number of components and processes, while the circuit reliability is maintained through the optimized design of the remaining essential stages.
Solution Approach 2:
Instead of adding dummy circuits to ensure reliability (conventional approach), the patent inverts the approach by achieving reliability through optimized design of minimal essential circuits. This inversion improves manufacturing efficiency while maintaining circuit stability through careful design rather than redundancy.
Data Source
AI summary
A gate driving circuit according to one or more embodiments of the present disclosure is described. The gate driving circuit may include a plurality of stage circuits connected to be cascaded to each other along a first direction, outputting a plurality of output signals. Each stage circuit of the plurality of stage circuits may include a circuit area and a dummy area. The circuit area is an area in which a circuit portion including at least one thin film transistor for controlling the output of the plurality of output signals is disposed. The dummy area is an area in which an undercut line extended in a second direction crossing the first direction is disposed.