Gate Driving Unit Shift Register Control Line Sharing
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Solution Overview
Problem
High-resolution 8 k active matrix organic light-emitting diode (AMOLED) display panels face challenges in achieving high resolution due to signal line crossovers and increased parasitic capacitance in limited pixel layout spaces, which hinder efficient gate driving.
Innovation Solution
The proposed solution involves a gate driving unit with Nth and (N+1)th stages of shift register units, where the pull-up node control circuits are connected to control lines, allowing for controlled potential management using multiple control signals, reducing signal line crossover and parasitic capacitance by sharing control lines between stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a large number of signal lines are used in the gate driving circuit to achieve high-resolution control, then the display resolution is improved, but signal line crossover occurs and parasitic capacitance increases
Solution Approach 1:
The patent merges the control functions of multiple signal lines into shared control lines. Specifically, the first pull-up control line and second pull-up control line are shared between the Nth stage and (N+1)th stage shift register units, reducing the total number of signal lines and minimizing crossover-related parasitic capacitance while maintaining high-resolution display capability
Solution Approach 2:
The control lines are designed with multi-functionality to serve multiple stages. The first pull-up control line and second pull-up control line can control pull-up nodes across different stages (Nth and (N+1)th stages), allowing a single signal line to perform multiple control functions and reducing the overall signal line count
2Manufacturing precision
If more signal lines are added to the gate driving circuit for high-resolution control, then the display resolution is improved, but signal line crossover occurs
Solution Approach 1:
The patent combines multiple control functions into shared control lines. The first pull-up control line and second pull-up control line are used by both the Nth stage and (N+1)th stage shift register units, merging what would otherwise require separate dedicated lines and thereby reducing crossover complexity
Solution Approach 2:
The patent introduces a new control dimension by implementing pull-up node control circuits that operate independently from traditional signal lines. This alternative control pathway allows stage control without requiring additional traditional signal lines, thus avoiding crossover issues
3Manufacturing precision
If the gate driving circuit uses traditional control methods, then the circuit structure is simple, but parasitic capacitance increases and high resolution cannot be achieved in limited space
Solution Approach 1:
The gate driving circuit is segmented into independent shift register units (Nth stage and (N+1)th stage), each with its own pull-up node control circuit. This segmentation allows compact arrangement in limited space while maintaining high-resolution control capability and reducing parasitic capacitance through localized control
Solution Approach 2:
The patent implements a new control dimension by using dedicated pull-up node control circuits that directly manage the potential of pull-up nodes without relying on traditional signal line routing. This dimensional change in control methodology enables high-resolution display in limited space while minimizing parasitic capacitance effects
Data Source
AI summary
A gate driving unit includes an Nth stage of shift register unit and an (N+1)th stage of shift register unit, N is a positive integer. The Nth stage of shift register unit includes an Nth stage of pull-up node control circuit, and the (N+1)th stage of shift register unit includes an (N+1)th stage of pull-up node control circuit. The Nth stage of pull-up node control circuit is electrically connected to an Nth stage of pull-up node and a control line, controls a potential of the Nth stage of pull-up node under the control of a control signal inputted by the control line. The (N+1)th stage of pull-up node control circuit is electrically connected to an (N+1)th stage of pull-up node and the control line, respectively, and controls a potential of the (N+1)th stage of pull-up node under the control of the control signal inputted by the control line.