Gate Driving Circuit with Variable Resistance for Switching Loss and Overvoltage Control
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Solution Overview
Problem
In power switching devices like MOSFETs and IGBTs, switching loss and erroneous ignition can occur due to inappropriate gate resistance, and existing solutions struggle to balance switching loss and overvoltage inhibition.
Innovation Solution
A gate driving circuit with parallel-connected field effect transistors in the gate resistance variable circuits, controlled by arithmetic units and memory to set optimal gate resistances dynamically based on operation conditions, ensuring appropriate gate resistance for reduced switching loss and inhibited overvoltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If gate resistance is reduced to decrease switching loss, then switching speed improves, but overvoltage and erroneous ignition risk increase
Solution Approach 1:
The patent applies dynamics by making the gate resistance variable rather than fixed. The gate resistance variable circuit changes the resistance value dynamically based on the switching state of the power switching device. During turn-on, lower resistance is applied for fast switching and low loss. During turn-off, higher resistance is applied to control dv/dt and prevent overvoltage and erroneous ignition. This dynamic adjustment resolves the contradiction between switching speed and overvoltage suppression.
Solution Approach 2:
The patent changes the parameter of gate resistance from a constant value to a variable value that adapts to different operating conditions. By using the gate resistance variable circuit with control signals from the driving logic circuit, the resistance parameter is modified according to whether the device is turning on or off, enabling optimization of both switching loss and overvoltage prevention through parameter adaptation.
2Object-affected harmful factors
If gate resistance is increased to suppress overvoltage, then dv/dt control improves, but switching loss increases
Solution Approach 1:
The patent uses dynamic adjustment of gate resistance to apply high resistance only during turn-off for overvoltage suppression, while using low resistance during turn-on for efficient switching. This temporal separation of resistance values eliminates the need to constantly maintain high resistance, thereby preventing switching loss increase while still achieving overvoltage control.
Solution Approach 2:
The gate resistance variable circuit implements periodic action by alternating between low resistance (during turn-on phase) and high resistance (during turn-off phase) according to the switching cycle. This periodic switching of resistance values allows the system to optimize for different objectives at different times in the switching cycle, resolving the contradiction between overvoltage suppression and switching efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for adjustable gate resistance to minimize switching loss, prevent overvoltage, and avoid erroneous ignition by synchronizing gate voltage control with switching device operations, effectively managing the trade-off between switching speed and noise levels.
Implementation Method 1
a first gate resistance variable circuit electrically connected between the first transistor and the gate electrode, the first gate resistance variable circuit including a plurality of field effect transistors connected in parallel; a second gate resistance variable circuit electrically connected between the second transistor and the gate electrode, the second gate resistance variable circuit including a plurality of field effect transistors connected in parallel
Data Source
AI summary
A gate driving circuit of embodiments is provided with a first transistor which controls a gate-on voltage applied to a gate electrode of a switching device, a second transistor which controls a gate-off voltage applied to the gate electrode of the switching device, a driving logic circuit which controls turn-on/turn-off of the first and second transistors, a first power source which supplies the gate-on voltage to the gate electrode when the first transistor is turned on, a second power source which supplies the gate-off voltage to the gate electrode when the second transistor is turned on, a first gate resistance variable circuit in which a plurality of field effect transistors is connected in parallel, a second gate resistance variable circuit in which a plurality of field effect transistors is connected in parallel, and a gate resistance control circuit which controls gate voltages of a plurality of field effect transistors.