Gate Driving Circuit Voltage Self-Setting for Irregular Screens
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Solution Overview
Problem
Existing gate driving circuits face challenges in designing for irregular-shaped screens due to densely arranged signal lines in the pad area, making it difficult to cut and arrange components efficiently.
Innovation Solution
A gate driving circuit with N-stage units, where each stage has a first and second voltage terminal, and transmission paths that are conductive in a non-operative state, allowing preset voltages to be transmitted through internal paths, reducing the need for external signal lines and enabling self-setting of voltages, thereby reducing the number of signal lines required in the pad area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If signal lines are densely arranged in the pad area to support traditional gate driving circuits, then the circuit can operate normally, but it becomes difficult to cut and design irregular-shaped screens
Solution Approach 1:
The patent extracts the voltage supply function from external voltage lines and relocates it to the clock signal terminal. The clock signal terminal receives both clock signals and voltage levels, eliminating the need for separate external low voltage lines in the pad area. This extraction reduces signal line density and facilitates irregular-shaped screen design.
Solution Approach 2:
The clock signal terminal is given multi-functionality to serve both as a clock signal input and a voltage supply terminal. By making the clock signal terminal universal, the patent reduces the number of dedicated voltage terminals needed, thereby reducing signal line density in the pad area and enabling easier cutting for irregular shapes.
2Device complexity
If external voltage lines are used to provide preset voltages to gate driving units, then the gate driving circuit can operate normally, but the number of signal lines in the pad area increases
Solution Approach 1:
The patent merges the voltage supply function with the clock signal terminal. The clock signal terminal receives both clock signals and preset voltages (such as ELVDD or ELVSS levels), combining multiple functions into a single terminal. This merging reduces the number of external voltage lines needed while ensuring the gate driving circuit operates normally.
Solution Approach 2:
The gate driving unit uses its own clock signal terminal to obtain preset voltages internally, rather than relying on external voltage lines. The internal transmission path transmits the preset voltage from the clock signal terminal to the first voltage terminal, enabling the circuit to serve itself and reduce external connections.
3Adaptability or versatility
If traditional gate driving circuit design is used, then the circuit structure is simple, but it requires more external voltage lines and reduces flexibility for screen shape design
Solution Approach 1:
The patent introduces dynamic control through the first pull-down unit, which is controlled by a control signal to dynamically adjust the transmission of preset voltages. This dynamic mechanism allows the circuit to adapt to different operating states and screen configurations, enhancing flexibility for various screen shapes while maintaining a manageable circuit structure.
Data Source
AI summary
A gate driving circuit provided in embodiments of the present disclosure includes: N-stage gate driving units, the gate driving unit at each stage of the N-stage gate driving units having a first voltage terminal and a clock signal terminal, and a first transmission path being formed between the first voltage terminal and the clock signal terminal, wherein at each stage, the first transmission path of the gate driving unit is conductive when the gate driving unit is in a non-operative state; and a first voltage line connected to the first voltage terminal of the gate driving unit at each stage. A preset voltage received by a clock signal terminal of a gate driving unit that is in a non-operative state is transmitted to the first voltage line through the first transmission path of the gate driving unit.