Gate Driving Circuit With Diodes for Variable Refresh Rate Panels
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Solution Overview
Problem
The implementation of variable refresh rate (VRR) technology in electroluminescent display devices increases power consumption and reduces the yield of display panels due to the addition of many circuit elements in the gate driving circuit, which also enlarges the non-display area.
Innovation Solution
A gate driving circuit design incorporating switching transistors and diodes to control gate signals, allowing variable refresh rates for different pixel areas, minimizing power consumption without degrading image quality by using diodes to prevent gate signal waveform errors and reducing the number of transistors and wires.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If variable refresh rate (VRR) technology is implemented by adding circuit elements to the gate driving circuit, then power consumption can be reduced, but the device complexity increases and the non-display area enlarges
Solution Approach 1:
The patent merges the VRR control function with the existing gate driving circuit by integrating signal transmitters and switching transistors into the conventional gate driver structure. This allows variable refresh rate functionality to be achieved without adding separate, independent control circuits, thereby reducing overall device complexity while maintaining power consumption benefits.
Solution Approach 2:
The gate driving circuit is designed to perform multiple functions: it can operate in both fixed refresh rate mode and variable refresh rate mode using the same basic circuit structure. The signal transmitters and switching transistors enable the circuit to adapt to different refresh rate requirements without requiring dedicated hardware for each mode, thus avoiding increased device complexity.
2Use of energy by moving object
If variable refresh rate (VRR) technology is implemented by adding circuit elements to the gate driving circuit, then power consumption can be reduced, but the non-display area increases
Solution Approach 1:
The VRR control circuitry is merged with the existing gate driving circuit layout, utilizing the same physical space and interconnect resources. The signal transmitters are integrated alongside the gate driver transistors, and the control wires are routed through existing signal paths, thereby minimizing the additional non-display area required.
Solution Approach 2:
The patent utilizes the time dimension by implementing VRR through temporal control of refresh rates rather than requiring additional spatial circuit elements. The switching transistors control when signals are transmitted to different pixel areas, enabling power savings through time-based modulation rather than through additional hardware components that would occupy non-display area.
3Reliability
If diodes are added to prevent gate signal waveform errors, then reliability improves, but the device complexity increases
Solution Approach 1:
Diodes are introduced as intermediary elements between the signal transmitters and the gate lines to prevent waveform errors. These diodes act as one-way valves for electrical signals, ensuring that signals flow in the correct direction and preventing feedback or reflection issues that could cause waveform distortion. The diodes are strategically placed at critical signal transition points where waveform integrity is most vulnerable.
Solution Approach 2:
The patent uses simple diode structures rather than complex active components to achieve waveform protection. Diodes are among the simplest semiconductor devices with straightforward fabrication processes, making them cost-effective and easy to integrate. Their simple structure minimizes the increase in device complexity while providing reliable waveform protection.
Data Source
AI summary
A gate driving circuit, and a display panel and display device including the gate driving circuit are discussed. The display device in an example includes a first switching transistor connected between an output node of a first signal transmitter from which a first gate signal is output and a first gate line, a second switching transistor connected to the output node of the first signal transmitter, a first diode connected between the second switching transistor and the first gate line, a third switching transistor connected between an output node of a second signal transmitter from which a second gate signal is output and a second gate line, a fourth switching transistor connected to the output node of the second signal transmitter, and a second diode connected between the fourth switching transistor and the second gate line.


