Gate Driving Circuit for Variable Refresh Rate Display Panels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The implementation of variable refresh rate (VRR) technology in electroluminescent display devices necessitates the addition of many circuit elements, leading to a decrease in yield and an increase in non-display area.
Innovation Solution
A gate driving circuit design incorporating switching transistors and diodes allows for varying refresh rates across different pixel areas, reducing power consumption without degrading image quality by selectively connecting gate lines through diodes and transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If VRR technology is implemented by adding circuit elements to the gate driving circuit, then power consumption can be reduced, but the yield decreases and the non-display area increases
Solution Approach 1:
The gate driving circuit is designed to perform multiple functions: it can operate in both fixed refresh rate mode and variable refresh rate mode using the same basic circuit structure. The signal transmitter and switching transistors enable the circuit to adapt to different operating conditions without requiring separate dedicated circuits for each mode, thereby reducing overall circuit element additions while achieving VRR functionality.
Solution Approach 2:
The gate driving circuit incorporates dynamic switching capability through switching transistors (first, second, third, fourth switching transistors) that can change their connection states based on operating conditions. This dynamic reconfiguration allows the circuit to adjust between different refresh rates by selectively connecting or disconnecting gate lines, enabling power consumption reduction without permanently adding complex fixed infrastructure that would harm yield.
2Loss of energy
If VRR technology is implemented by adding circuit elements to the gate driving circuit, then power consumption can be reduced, but the non-display area increases
Solution Approach 1:
The gate driving circuit merges the VRR control functionality into the existing gate driving structure by integrating switching transistors and diodes within the same circuit block. This consolidation allows the VRR control logic to share physical space with the standard gate driving components, minimizing the additional area required and reducing the increase in non-display area while still achieving power consumption reduction through variable refresh rate capability.
3Loss of energy
If switching transistors and diodes are added to enable VRR, then power consumption is reduced, but the circuit complexity increases
Solution Approach 1:
The gate driving circuit is segmented into functional modules: a signal transmitter unit that generates control signals, switching transistor units (first, second, third, fourth switching transistors) that control connections, and diode units that prevent signal interference. This modular segmentation organizes the additional components into manageable functional blocks, making the increased circuit complexity more systematic and easier to manufacture with consistent yield.
Solution Approach 2:
Diodes are introduced as intermediary components between the switching transistors and gate lines to prevent unwanted signal feedback and interference. These intermediary diodes simplify the overall circuit design by providing unidirectional signal flow control, eliminating the need for more complex bidirectional control mechanisms that would further increase circuit complexity and manufacturing difficulty.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
Disclosed are a gate driving circuit, and a display panel and a display device including the gate driving circuit. The gate driving circuit includes a first switching transistor connected between a first gate line and an output node of a first signal transmitter from which a first gate signal is output; a second switching transistor connected to the output node of the first signal transmitter; a first diode connected between the second switching transistor and the first gate line; a third switching transistor connected between a second gate line and an output node of a second signal transmitter from which a second gate signal is output; a fourth switching transistor connected to the output node of the second signal transmitter; and a second diode connected between the fourth switching transistor and the second gate line.