Gate Electrode Forming with Asymmetric Dummy Gate
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Solution Overview
Problem
Conventional methods for forming gate electrodes in semiconductor devices cause substrate damage and result in incomplete filling of metal material in narrow trenches, leading to increased parasitic resistance and reduced reliability of MOS transistors, especially at dimensions below 32 nm.
Innovation Solution
A method involving the formation of a sacrificial layer with decreasing doping ion density, followed by wet etching to create a dummy gate electrode with a wider top than bottom, facilitating the formation of a gate trench with a similar width ratio, which is then filled with gate material to prevent substrate damage and improve filling efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If Argon sputtering process is used to increase the width of the top of the trench, then the filling efficiency of metal material is improved, but the substrate is damaged
Solution Approach 1:
The patent introduces an intermediary substance (sacrificial layer made of silicon oxide or silicon nitride) that mediates between the etching process and the substrate. This sacrificial layer is selectively removed to widen the trench top, achieving the desired geometry without directly exposing the substrate to damaging Argon sputtering. The intermediary protects the substrate while still allowing the trench geometry to be modified for improved metal filling.
2Reliability
If conventional gate-last process is used to prevent gate electrode from high temperature, then the threshold voltage drift is avoided, but the process complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming the gate electrode structure before the high-temperature annealing process that creates source and drain regions. The gate electrode is formed as a dummy structure initially, then the source and drain are formed through ion implantation and annealing, and finally the dummy gate is replaced with the actual metal gate electrode. This preliminary formation of the gate structure protects it from high-temperature damage while maintaining process efficiency.
3Length of moving object
If dummy gate trench width is decreased for scaling, then the device dimensions are reduced, but the metal material filling efficiency decreases
Solution Approach 1:
The patent employs asymmetric trench geometry by selectively removing the sacrificial layer from the top region of the trench while leaving it intact at the bottom. This creates a trapezoidal cross-section with a wider top opening than bottom width, allowing metal material to be deposited efficiently from the top down without leaving voids or holes, even in scaled-down devices. The asymmetric design resolves the conflict between small dimensions and complete filling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method prevents substrate damage and enhances the filling efficiency of gate material, reducing the formation of holes and parasitic resistance, thereby improving the reliability and performance of MOS transistors.
Implementation Method 1
removing part of the patterned sacrificial layer by wet etching with the patterned hard mask layer as a mask
Data Source
AI summary
A method for forming a gate electrode includes: providing a substrate; forming a gate dielectric layer and forming a sacrificial layer, the sacrificial layer including doping ions, a density of the doping ions in the sacrificial layer decreasing with increasing distance from the substrate; forming a hard mask layer; patterning the sacrificial layer and the hard mask layer; removing part of the patterned sacrificial layer by wet etching with the patterned hard mask layer as a mask, to form a dummy gate electrode which has a top width bigger than a bottom width, and removing the patterned hard mask layer; removing the dummy gate electrode and filling a gate trench with gate material to form a gate electrode which has a top width bigger than a bottom width, which facilitates the filling of the gate material and can avoid or reduce cavity forming in the gate material.