Gate Electrode Driving Circuit Bezel Reduction via Low Frequency Control

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Solution Overview

Problem

Current gate driver on array (GOA) circuits require numerous clock signal lines to compensate for transistor threshold voltages, leading to larger bezels in display panels due to increased space requirements.

Innovation Solution

A gate electrode driving circuit is designed with a logical addressing unit, pull-up and drop-down units, and a low frequency control signal source, which reduces the number of clock signal lines needed by utilizing a low frequency control signal source and third drop-down unit to regulate electric potentials, thereby minimizing the circuit's width and bezel size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If three different clock signals are used to drive circuits and perform stage transfer in GOA circuits, then transistor threshold voltage compensation is achieved, but the number of clock signal lines increases to twelve, resulting in larger bezels

Engineering Contradiction:
Improvetransistor threshold voltage compensationVSAvoidbezel size
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent changes the frequency parameter of the control signal from high frequency (traditional clock signals) to low frequency. The low frequency control signal source generates a single control signal at a lower frequency that can still achieve the required threshold voltage compensation function, thereby reducing the number of signal lines needed while maintaining the compensation effect.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The single low frequency control signal is designed to perform multiple functions that previously required three different clock signals. By making the control signal universal and multi-functional, the patent eliminates the need for separate clock signals for different operations, thus reducing the total number of clock signal lines from twelve to a manageable number.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If twelve clock signal lines are used to lower impedance of clock signal lines, then signal integrity is improved, but the circuit width increases, making narrow bezels impossible

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit width
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent changes the frequency parameter of the control signal from high frequency to low frequency. This parameter change allows the use of fewer signal lines while maintaining adequate signal integrity, as lower frequency signals have better noise immunity and can tolerate higher impedance without significant degradation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and eliminates redundant clock signal lines from the circuit. By removing the unnecessary high-frequency clock signals and retaining only the essential low-frequency control signal, the circuit width is reduced while the core functionality and signal integrity are preserved.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20220130307A1Gate electrode driving circuit and display panel
Publication Date: 2022.04.28 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US20220130307A1 patent drawing
  • US20220130307A1 patent drawing
  • US20220130307A1 patent drawing

AI summary

A gate electrode driving circuit and a display panel are provided. By disposing a low frequency control signal source and a third drop-down unit, the gate electrode driving circuit makes the low frequency control signal source and the third drop-down unit replace one group of clock signal. Furthermore, because the low frequency control signal source and the third drop-down unit occupy less space, a width of the gate electrode driving circuit is reduced, thereby reducing a bezel of the display panel.