Gate Electrode Configuration for ESD Defect Correction in Displays
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Solution Overview
Problem
In organic EL displays, electrostatic discharge (ESD) during manufacturing can cause short-circuit defects between the gate and upper electrodes in the capacitor of each sub-pixel, making it difficult to correct these defects effectively.
Innovation Solution
The display device features a TFT layer with a gate electrode configuration where the angle between the upper surface of the base substrate and the end surface of the gate electrode not overlapping the semiconductor layer is greater than the angle formed between the upper surface and the end surface overlapping the semiconductor layer, facilitating the correction of short-circuit defects by laser irradiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the gate electrode and lower electrode of the capacitor are integrated to form an island shape, then the device complexity is reduced and manufacturing is simplified, but short-circuit defects occur between the gate and upper electrodes due to ESD during manufacturing
Solution Approach 1:
The gate electrode is divided into two distinct regions: a first gate electrode region overlapping the semiconductor layer and a second gate electrode region not overlapping the semiconductor layer. This segmentation allows the capacitor's lower electrode to be formed only in the first region, separating it from the ESD-prone second region while maintaining the integrated island structure's simplicity.
Solution Approach 2:
Different regions of the gate electrode are assigned different functions: the first gate electrode region serves both as part of the transistor gate and the capacitor's lower electrode, while the second gate electrode region serves only as a transistor gate extension. This local differentiation prevents short-circuits by restricting the capacitor electrode to the protected first region.
2Ease of repair
If defect correction is performed by identifying the location of the short-circuit from the entire capacitor, then the short-circuit defect can be corrected, but the correction process becomes time-consuming and complex
Solution Approach 1:
The potentially defective second gate electrode region is extracted and separated from the capacitor structure. By placing the capacitor's lower electrode only in the first gate electrode region (which does not extend beyond the semiconductor layer), the design removes the ESD-vulnerable area from the capacitor circuit, eliminating the need for complex defect identification and correction procedures.
Solution Approach 2:
The gate electrode is designed in advance with a configuration that prevents short-circuit defects rather than correcting them after occurrence. The second gate electrode region is intentionally extended beyond the semiconductor layer but kept electrically isolated from the capacitor, proactively preventing ESD-induced short-circuits before they can affect capacitor functionality.
Data Source
AI summary
A display device includes: a base substrate; a TFT layer including a plurality of pixel circuits arranged; and a light-emitting element layer. Each of the plurality of pixel circuits includes: a TFT including a semiconductor layer, a gate insulating film, and a gate electrode; and a capacitor including the gate electrode, a first inorganic insulating film, and a capacitive electrode. The capacitive electrode extends all around a perimeter of the gate electrode and extends to an outside of the perimeter. An angle formed between an upper surface of the base substrate and at least a part of an end surface in a circumferential direction of the gate electrode not overlapping the semiconductor layer in the plan view is greater than an angle formed between the upper surface of the base substrate and an end surface of the gate electrode overlapping the semiconductor layer in the plan view.