Semiconductor Gate Electrode Height Control via Protective Film Etching
Solution Overview
Problem
Existing methods for manufacturing vertical MOS transistors face challenges in controlling the heights of gate electrodes for PMOS and NMOS transistors, leading to inconsistent transistor characteristics and difficulty in preventing the short channel effect.
Innovation Solution
A method involving the formation of first and second insulating films on a semiconductor substrate, followed by the creation of pillars and silicon films with precise etching using chlorine and fluorine gases to achieve equal heights for p-type and n-type gate electrodes, ensuring uniformity and preventing damage to the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If selective ion-implanting is used to form gate electrodes, then impurity doping is achieved, but gate electrode height control becomes difficult
Solution Approach 1:
The patent applies preliminary action by forming a protective film on the gate insulating film surface before the silicon film formation and etching processes. This protective film prevents damage to the gate insulating film during subsequent processing steps, enabling precise gate electrode height control without compromising the underlying structures. The protective film is removed after the etching is complete, leaving the gate insulating film intact.
Solution Approach 2:
The patent uses an intermediary approach by introducing a protective film as a mediator between the etching process and the gate insulating film. This protective film acts as a buffer that allows the etching gas to remove excess silicon film while preventing direct contact and potential damage to the gate insulating film, thus enabling precise height control.
2Manufacturing precision
If anisotropic dry etching with chlorine gas is used, then silicon film etching is achieved, but gate insulating film damage occurs
Solution Approach 1:
The patent applies beforehand cushioning by depositing a protective film on the gate insulating film surface before the anisotropic dry etching process. This protective film serves as a cushion that absorbs the harsh etching conditions, preventing direct damage to the gate insulating film while allowing the silicon film to be etched precisely. The protective film is designed to be resistant to the etching gas or easily removable after etching.
3Reliability
If gate electrode height is not controlled, then manufacturing is simplified, but transistor characteristics become inconsistent
Solution Approach 1:
The patent replaces the mechanical/physical approach of controlling gate electrode height through ion implantation parameters with a chemical etching approach. By using anisotropic dry etching with a protective film, the method achieves precise height control through chemical reactions that can be more accurately controlled and monitored, leading to consistent transistor characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of PMOS and NMOS transistors with gate electrodes of equal height, enhancing transistor characteristics and preventing the short channel effect, thereby achieving desired performance metrics such as threshold voltage.
Implementation Method 1
A part of the silicon film is removed by dry etching
Implementation Method 2
The second part of the silicon film is removed by dry etching using a gas including fluorine
Data Source
AI summary
A semiconductor device manufacturing method may include the following processes. A semiconductor substrate is partially removed using a first insulating film having first and second portions as a mask to form first and second pillars of the semiconductor substrate. A second insulating film is formed on side surfaces of the first and second pillars. A silicon film is formed on the first and second insulating films. A first part of the silicon film, which is on upper surfaces of the first and second portions, is removed. A coating film, which covers the upper surfaces of the first and second portions, is formed over the semiconductor substrate. The coating film is partially removed to expose the first insulating film and a second part of the silicon film. The second part is on side surfaces of the first and second portions. The second part is removed by dry etching.