Gate Electrode Nitrogen Doping for CMOS Cleaning Yield
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Solution Overview
Problem
The fabrication of advanced CMOS devices faces challenges in achieving uniform dopant distribution and preventing etch damage during the formation of gate electrodes, leading to increased device failures and yield losses due to non-uniform dopant concentration and sensitivity to metallic surface contaminations during wet chemical cleaning processes.
Innovation Solution
Modifying the parasitic PN junction in the gate electrode material by introducing an inert species, such as nitrogen, to reduce electrostatic charges and minimize etch damage during wet chemical cleaning, thereby stabilizing the etch process and enhancing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation is used to create dopant profiles in gate electrode material, then dopant concentration can be increased to compensate for reduced conductivity, but non-uniform dopant distribution occurs leading to defective gates during cleaning processes
Solution Approach 1:
The patent applies preliminary action by performing a first ion implantation to create a uniform base dopant distribution in the gate electrode material before subsequent processing steps. This initial uniform doping establishes a reliable foundation that prevents defective gate formation during later cleaning processes, while allowing subsequent non-uniform implantations to adjust dopant concentrations in specific regions without compromising overall gate reliability.
2Reliability
If higher dopant concentrations are implanted to compensate for reduced conductivity in scaled transistors, then transistor performance is improved, but complex implantation cycles are required with strict thermal budget control
Solution Approach 1:
The patent segments the ion implantation process into multiple distinct cycles, each with specific purposes. The first implantation cycle establishes uniform base doping, while subsequent cycles adjust dopant concentrations in targeted regions. This segmentation allows each cycle to be optimized independently, reducing the overall complexity compared to attempting to achieve all doping requirements in a single complex cycle, while still achieving the necessary dopant concentrations for improved transistor performance.
3Ease of manufacture
If gate electrode material is cleaned using wet chemical processes, then surface contaminations are removed, but etch damage occurs due to sensitivity to metallic surface contaminations and non-uniform dopant distribution
Solution Approach 1:
The patent applies preliminary action by establishing a uniform base dopant distribution in the gate electrode material before the wet chemical cleaning process. This pre-established uniform doping structure makes the gate electrode material more resistant to etch damage during cleaning, even when metallic surface contaminations are present. The uniform dopant distribution creates a more stable material structure that withstands the cleaning process better, allowing effective contamination removal without excessive etch damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The modification of the parasitic PN junction reduces etch damage and increases production yield by minimizing the sensitivity of the gate electrode material to metallic contaminations, ensuring more reliable and reproducible transistor formation.
Implementation Method 1
Modifying the parasitic PN junction in the gate electrode material by introducing an inert species, such as nitrogen
Data Source
AI summary
By incorporating nitrogen into the P-doped regions and N-doped regions of the gate electrode material prior to patterning the gate electrode structure, yield losses due to reactive wet chemical cleaning processes may be significantly reduced.