Gate Electrode Silicide Formation Without Side-Wall Oxide

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Solution Overview

Problem

Conventional semiconductor devices require additional process steps and cannot form silicide on the side faces of the gate electrode due to the necessity of a side-wall oxide film, which increases resistance and poses a risk of short-circuiting between the gate electrode and the source/drain region.

Innovation Solution

A semiconductor device with silicide formed on both the upper and side faces of the gate electrode and the source/drain region, eliminating the need for a side-wall oxide film, allowing for reduced resistance variation and preventing short-circuiting by forming the second silicide at points separated from the gate electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a side-wall oxide film is formed on the gate electrode to prevent short-circuiting, then reliability is improved, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improveprevention of short-circuitingVSAvoidnumber of process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates the side-wall oxide film from the device structure, replacing it with a silicide-based solution. By removing this intermediate layer, the patent reduces the number of manufacturing steps while maintaining the essential function of preventing short-circuiting between the gate electrode and source/drain region.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the material parameter from oxide to silicide, fundamentally altering the approach to preventing short-circuiting. By forming silicide on the gate electrode surface instead of using a side-wall oxide film, the patent achieves both short-circuit prevention and resistance reduction with fewer process steps.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a side-wall oxide film is formed to prevent short-circuiting, then reliability is improved, but resistance of the gate electrode increases

Engineering Contradiction:
Improveprevention of short-circuitingVSAvoidresistance of gate electrode
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the material parameter from oxide to silicide, which has superior electrical conductivity. By forming silicide on the gate electrode surface, the patent simultaneously achieves short-circuit prevention and reduces gate electrode resistance, eliminating the trade-off present in conventional approaches.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention uses silicide as a composite material that combines the insulating properties needed for short-circuit prevention with the conductive properties needed for low resistance. This multi-functional material replaces the side-wall oxide film and enables both objectives to be achieved simultaneously.

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If silicide is formed on the gate electrode surface, then resistance is reduced, but short-circuiting between gate electrode and source/drain region may occur

Engineering Contradiction:
Improveresistance of gate electrodeVSAvoidprevention of short-circuiting
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The invention applies silicide selectively to specific regions of the gate electrode surface, creating local quality variations. By controlling the spatial distribution and thickness of the silicide layer, the patent achieves low resistance where needed while maintaining insulation where required, thus preventing short-circuiting.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention transitions from a two-dimensional side-wall oxide film to a three-dimensional silicide structure that covers both the upper surface and side faces of the gate electrode. This dimensional change allows the silicide to provide both conductive pathways for low resistance and protective coverage for short-circuit prevention.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Ease of manufacture

If no side-wall oxide film is formed, then manufacturing process is simplified, but silicide cannot be formed on side faces of the gate electrode

Engineering Contradiction:
Improvenumber of process stepsVSAvoidcoverage of silicide on gate electrode
Core Design Contradiction:
Ease of manufactureVSShape

Solution Approach 1:

The invention performs preliminary actions by forming the silicide layer early in the manufacturing process, before subsequent processing steps. This preliminary silicide formation ensures that both the upper surface and side faces of the gate electrode are covered, enabling complete silicide coverage without requiring a side-wall oxide film.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces resistance variation in the gate electrode, decreases overall resistance, and prevents short-circuiting without the need for a side-wall oxide film, simplifying the manufacturing process and eliminating the limitations of conventional methods.

Implementation Method 1

a first silicide provided on an upper face and side faces of the gate electrode; and a second silicide provided on a surface of the source/drain region

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS10879367B2Method for manufacturing semiconductor device
Publication Date: 2020.12.29 MITSUBISHI ELECTRIC CORP
  • US10879367B2 patent drawing
  • US10879367B2 patent drawing
  • US10879367B2 patent drawing

AI summary

A gate electrode (3) is provided on a main surface of a silicon substrate (1) via a gate insulating film (2). A source/drain region (4,5) is provided on sides of the gate electrode (3) on the main surface of the silicon substrate (1). A first silicide (6) is provided on an upper face and side faces of the gate electrode (3). A second silicide (7) is provided on a surface of the source/drain region (4,5). No side-wall oxide film is provided on the side faces of the gate electrode (3). The second silicide (7) is provided at a point separated from the gate electrode (3).