Gate Electrode Thickness for UV Shielding in Nonvolatile Memory

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Solution Overview

Problem

Nonvolatile semiconductor memory devices face challenges in controlling threshold voltage due to the influence of ultraviolet light during fabrication, leading to malfunction in writing and erasing operations, especially with miniaturization, as existing solutions require costly light shielding films and risk short circuits.

Innovation Solution

A nonvolatile semiconductor memory device with a multilayer dielectric and a polycrystalline silicon gate electrode, where the gate electrode's thickness is optimized to prevent ultraviolet light from reaching the dielectric, allowing for controlled charge accumulation and reduced fabrication costs by eliminating the need for ultraviolet-light shielding films.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If ultraviolet light shielding films are added to prevent charge accumulation in the multilayer dielectric, then threshold voltage control is improved, but device complexity and fabrication cost increase

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the ultraviolet light shielding film from the device structure by optimizing the gate electrode thickness to provide sufficient shielding without requiring additional layers. This removes the harmful factor (ultraviolet light reaching the dielectric) without adding device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the ultraviolet shielding function into the gate electrode itself by increasing its thickness. The gate electrode simultaneously serves as both the functional electrode and the ultraviolet shield, combining two functions into one component to avoid additional fabrication steps.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If ultraviolet light shielding films are added to prevent charge accumulation, then writing and erasing operation reliability is improved, but fabrication cost increases

Engineering Contradiction:
Improvewriting and erasing operation reliabilityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The ultraviolet shielding function is merged into the gate electrode structure. By thickening the gate electrode to 100-200 nm, it simultaneously performs its electrical function and blocks ultraviolet light, eliminating the need for separate shielding films and reducing fabrication costs.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate electrode serves itself by providing ultraviolet shielding as an inherent property of its increased thickness. The structure protects itself from ultraviolet damage without requiring external protective layers, reducing manufacturing complexity and cost.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If the gate electrode thickness is increased to block ultraviolet light, then threshold voltage control is improved, but device dimensions increase

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidgate electrode thickness
Core Design Contradiction:
Manufacturing precisionVSLength of moving object

Solution Approach 1:

The patent changes the thickness parameter of the gate electrode to a specific range (100-200 nm) that provides sufficient ultraviolet shielding while minimizing the increase in device dimensions. This optimized parameter range achieves the desired threshold voltage control without excessive dimensional growth.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively controls threshold voltage without affecting writing and erasing operations, reduces fabrication costs, and enhances stability by ensuring that the diffusion regions overlap with the fixed charge accumulation regions, allowing for precise voltage control and improved reliability.

Implementation Method 1

When the gate electrode or the silicon substrate 100 is irradiated with ultraviolet light, electrons existing in the gate electrode or the silicon substrate 100 are excited.

Methodology Applied
Scientific EffectUltraviolet light absorption: Absorption (EM radiation)

Implementation Method 2

When the gate electrode or the silicon substrate 100 is irradiated with ultraviolet light, electrons existing in the gate electrode or the silicon substrate 100 are excited. Among the excited electrons, electrons having obtained energy that can go beyond the energy barrier existing between the silicon substrate 100 and the multilayer dielectric 101 or between the gate electrode and the multilayer dielectric 101 are captured in the multilayer dielectric 101.

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 3

Among the excited electrons, electrons having obtained energy that can go beyond the energy barrier existing between the silicon substrate 100 and the multilayer dielectric 101 or between the gate electrode and the multilayer dielectric 101 are captured in the multilayer dielectric 101.

Methodology Applied
Scientific EffectCharge accumulation: Electrical Accumulator

Implementation Method 4

writing and erasing operations are typically performed in the manner in which hot carriers are produced to locally capture charges in the multilayer dielectric 101 and extract the captured charges.

Methodology Applied
Scientific EffectHot carrier injection:

Data Source

PatentUS7518180B2Nonvolatile semiconductor memory device and method for fabricating the same
Publication Date: 2009.04.14 PANNOVA SEMIC LLC
  • US7518180B2 patent drawing
  • US7518180B2 patent drawing
  • US7518180B2 patent drawing

AI summary

A nonvolatile semiconductor memory device includes: a gate dielectric made of a multilayer dielectric that is formed on a substrate and discretely accumulates charges; a gate electrode formed on the gate dielectric; a pair of diffusion regions formed in the surface of the substrate with the gate electrode interposed therebetween and serving as a source and a drain; and a channel region existing between the diffusion regions. At least one of regions of the gate dielectric located between the pair of diffusion regions and lateral end parts of the gate electrode opposed to the diffusion regions includes a fixed charge accumulation region in which charges produced by irradiating the gate electrode with ultraviolet light can be accumulated, and at least one said diffusion region located below the fixed charge accumulation region is formed to overlap with the fixed charge accumulation region in plan configuration and extend beyond the fixed charge accumulation region toward the middle of the channel region in plan configuration.