Gate Electrode Thickness Variation for Silicidation Uniformity
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Solution Overview
Problem
Conventional semiconductor devices with fully-silicided gate electrodes face issues of unreacted polysilicon regions and locally different silicide compositions due to pattern dependence on gate length or area, leading to variations in threshold voltage and circuit operation.
Innovation Solution
The semiconductor device is configured with a first transistor having a smaller gate length and a second transistor with a larger gate length, where the second gate electrode has a thinner middle portion to ensure uniform full silicidation, preventing unreacted silicon regions and locally different silicide compositions by adjusting the thickness ratio of the metal film to the silicon film.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a uniform thickness gate electrode is used for all transistors, then the fabrication process is simple, but large-gate transistors exhibit unreacted polysilicon regions and locally different silicide compositions
Solution Approach 1:
The patent applies local quality by making the gate electrode thickness non-uniform: thinner in the middle portion and thicker at both ends. This local variation ensures that the metal film thickness-to-silicon film thickness ratio is appropriate in each region, enabling uniform full silicidation across transistors with different gate lengths while preventing unreacted polysilicon regions in large-gate transistors and metal-rich areas in small-gate transistors.
2Reliability
If the metal film thickness is increased to ensure full silicidation of large-gate transistors, then silicidation completeness improves, but small-gate transistors develop metal-rich areas with different silicide compositions
Solution Approach 1:
The patent makes the silicon film thickness vary locally across the gate electrode width. By having thinner silicon in the middle and thicker silicon at the ends, the structure compensates for the fixed metal film thickness, ensuring that the metal-to-silicon thickness ratio is appropriate in each region. This prevents both unreacted polysilicon and metal-rich areas, maintaining uniform silicide composition across all transistor sizes.
Solution Approach 2:
The patent introduces thickness variation in the vertical dimension (z-axis) of the gate electrode structure. Instead of varying metal film thickness horizontally, it varies silicon film thickness vertically across the gate width, creating a three-dimensional non-uniform structure that optimizes silicidation conditions for different gate lengths simultaneously.
3Adaptability or versatility
If transistors with different gate lengths are formed on the same substrate, then circuit functionality increases, but threshold voltage variations occur due to pattern dependence
Solution Approach 1:
The patent applies local quality by creating a gate electrode structure where the silicon film thickness varies across the gate width: thinner in the middle portion and thicker at both ends. This local thickness variation compensates for the pattern dependence effect, ensuring that transistors with different gate lengths on the same substrate achieve uniform full silicidation and consistent threshold voltages, thereby maintaining reliability while supporting diverse circuit functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures uniform full silicidation and suppresses variations in operation characteristics such as threshold voltage, achieving desired transistor performance by preventing unreacted polysilicon regions and metal-rich areas.
Implementation Method 1
forming a metal film on the first gate silicon film and the second gate silicon film and then performing heat treatment on the metal film after step (f), thereby fully siliciding the first gate silicon film and the second gate silicon film
Implementation Method 2
performing heat treatment on the metal film after step (f), thereby fully siliciding the first gate silicon film and the second gate silicon film
Data Source
AI summary
A semiconductor device includes: a semiconductor substrate divided into a first region and a second region; a first MIS transistor formed in the first region of the semiconductor substrate and including a stack of a first gate insulating film and a fully-silicided first gate electrode; and a second MIS transistor formed in the second region of the semiconductor substrate and including a stack of a second gate insulating film and a fully-silicided second gate electrode. The second gate electrode has a gate length larger than that of the first gate electrode. A middle portion in the gate length direction of the second gate electrode has a thickness smaller than the thickness of the first gate electrode.