Gate-Emitter Voltage Control for Bipolar Power Semiconductors

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Solution Overview

Problem

Operating bipolar switchable power semiconductor components with gate-emitter voltages greater than or equal to 18 volts poses a risk of high short-circuit currents, potentially damaging the components, especially when switching on during a short circuit.

Innovation Solution

A method and control circuit that gradually increase the gate-emitter voltage in three stages: initially to a low value, then maintain or slightly increase it for a waiting period to detect short circuits, and finally to a higher value for reduced conduction losses, ensuring the voltage change rates differ significantly between stages to manage short-circuit currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If gate-emitter voltage is increased to >= 18V to reduce conduction losses, then energy efficiency is improved, but short-circuit current increases potentially destroying the device

Engineering Contradiction:
Improveconduction lossesVSAvoidshort-circuit current
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The gate-emitter voltage increase is segmented into three distinct time periods with different voltage rates. In the first time period, voltage increases at a first average rate; in the second time period, voltage increases at a lower second average rate; in the third time period, voltage increases at a third average rate. This segmentation allows the system to reach high gate-emitter voltages for reduced conduction losses while controlling the rate of increase to prevent destructive short-circuit currents.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies dynamic control of the gate-emitter voltage by varying the voltage increase rates across different time periods. The control circuit adjusts the voltage application dynamically based on the switching state and detected conditions, transitioning from lower rates during initial switching to higher rates in steady state, thereby optimizing both safety and efficiency.

Inventive Principle:
Principle #15Dynamics

2Productivity

If gate-emitter voltage is increased rapidly to reduce switching time, then productivity is improved, but short-circuit current detection capability deteriorates

Engineering Contradiction:
Improveswitching speedVSAvoidshort-circuit current detection
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The voltage increase is divided into three time periods with different rates. The second time period specifically uses a lower second average voltage rate than the first and third periods, creating a detection window where short-circuit currents can be identified before full voltage is applied, thus maintaining both speed and detection capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control circuit performs preliminary short-circuit detection during the second time period before the gate-emitter voltage reaches its final high value. This preliminary action allows the system to detect potential short circuits early and prevent damage while still achieving rapid switching by applying full voltage in the third time period if no short circuit is detected.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3729648B1Method for switching on a power semiconductor component
Publication Date: 2023.05.24 SIEMENS ENERGY GLOBAL GMBH & CO KG
  • EP3729648B1 patent drawingFigure 1~2
  • EP3729648B1 patent drawingFigure 3~4
  • EP3729648B1 patent drawingFigure 5~6

AI summary

The invention relates to a method for switching on a switchable bipolar power semiconductor component (703). The gate emitter voltage (VGE) of the power semiconductor component (703) is increased to a first voltage value (V1) at a first average voltage change rate (dVGE_1/dt) in a first time period (t0-t1). In a second time period (t1-t2), the gate emitter voltage (VGE) is then kept constant or is increased to a second voltage value (V2), wherein the gate emitter voltage has a second average voltage change rate (dVGE_2/dt) in the second time period, said second average voltage change rate being lower than the first average voltage change rate (dVGE_1/dt). In a third time period (t2-t3), the gate emitter voltage is increased to a third voltage value (V3) at a third average voltage change rate (dVGE_3/dt), wherein the third average voltage change rate (dVGE_3/dt) is greater than the second average voltage change rate (dVGE_2/dt), and the third voltage value (V3) is greater than or equal to 18 V.