Gate Pattern End Curvature for Short-Resistant Memory Cells
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Solution Overview
Problem
As semiconductor devices shrink, the distance between gate pattern structures decreases, leading to potential device failures due to convex rounding of end portions and increased risk of short circuits, as well as patterning defects where gate pattern structures fail to separate properly.
Innovation Solution
The implementation of concavely curved end portions for gate pattern structures, separated by a gate isolation region in a rounded hole configuration, maintains a secure distance and minimizes device defects by preventing short circuits and ensuring proper separation of gate patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between gate pattern structures is decreased to enable further miniaturization, then device density is improved, but the risk of short circuits and patterning defects increases
Solution Approach 1:
The gate pattern structures feature concavely curved end portions instead of straight or convex edges. This curvature design allows the gate patterns to be spaced closer together while preventing convex rounding defects and short circuits, enabling further miniaturization while maintaining reliability
Solution Approach 2:
The gate pattern structures employ asymmetric geometry with concave curved ends rather than symmetric straight edges. This asymmetric design creates a configuration where the minimum distance between adjacent gate patterns is optimized, allowing reduced spacing without compromising device separation or increasing short circuit risk
2Area of stationary object
If the distance between gate pattern structures is decreased, then device area is reduced, but manufacturing precision requirements increase due to patterning defects
Solution Approach 1:
The concavely curved end portions of the gate patterns provide a geometric configuration that is more robust against patterning defects. The curved geometry avoids the convex rounding issues that plague straight-edged patterns at small dimensions, allowing manufacturing at reduced areas with acceptable precision levels
Solution Approach 2:
The invention changes the geometric parameters of the gate pattern structures by introducing concave curvature at the ends. This parameter change fundamentally alters how the patterns behave during fabrication, reducing sensitivity to patterning variations and enabling smaller device areas without proportionally increasing defect rates
3Ease of manufacture
If conventional straight-edged gate patterns are used, then manufacturing is simpler, but device failures occur due to convex rounding of end portions
Solution Approach 1:
By using concavely curved end portions instead of straight edges, the invention eliminates the convex rounding defect mechanism while maintaining a relatively simple fabrication process. The curvature can be achieved through standard lithography and etching techniques, balancing manufacturability with reliability
Data Source
AI summary
A semiconductor device and a data storage system, the device including a lower structure; and an upper structure on the lower structure and including a memory cell array, wherein the lower structure includes a semiconductor substrate, first and second active regions spaced apart from each other in a first direction on the semiconductor substrate, the first and second active regions being defined by an isolation insulating layer on the semiconductor substrate, and first and second gate pattern structures extending in the first direction to cross the first and second active regions, respectively, on the semiconductor substrate, the first gate pattern structure and the second gate pattern structure have first and second end portions spaced apart from each other in a facing manner in the first direction, respectively, and the first and second end portions are concavely curved in opposite directions away from each other in a plan view.