Gate Extension Layout for Higher LDMOS Breakdown Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High voltage transistor devices, such as LDMOS devices, face challenges in achieving high breakdown voltage due to non-uniform electric fields, which can lead to junction edge breakdown effects.
Innovation Solution
The integration of a gate electrode with a plurality of gate extensions that laterally protrude from the sidewall of the gate electrode over the drift region, helping to spread the electric field and reduce field strength at the surface, thereby increasing the breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate electrode structure is used, then the device structure is simple, but the breakdown voltage is limited due to non-uniform electric fields and junction edge breakdown effects
Solution Approach 1:
The gate electrode is segmented into a main gate body and multiple gate extensions that protrude laterally from the sidewalls. This segmentation allows the gate to control electric field distribution at multiple locations (main channel and junction edges), thereby increasing breakdown voltage while maintaining a relatively simple single-piece structure that can be formed in one deposition step
Solution Approach 2:
The gate extensions protrude in the lateral dimension (perpendicular to the main gate length direction) to reach over the drift region and influence the electric field at the p-n junction edges. This dimensional extension allows the gate to control breakdown characteristics without increasing the vertical stack complexity or requiring additional gate layers
2Reliability
If the gate extensions are made longer to better spread the electric field, then the breakdown voltage increases, but the manufacturing precision requirements increase
Solution Approach 1:
The gate extensions are formed as an integral part of the main gate electrode structure, both being deposited simultaneously as a single continuous conductive layer. This merging approach ensures uniform material properties and reduces manufacturing variability, as the extensions and main gate body are created in one step without requiring separate alignment or deposition processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of gate extensions effectively increases the breakdown voltage of high voltage transistor devices by spreading the electric field and reducing surface field crowding, thus enhancing the device's operational reliability.
Implementation Method 1
The plurality of gate extensions are configured to generate an electric field within the drift region, which can laterally spread charges along a p-n junction of the device
Data Source
AI summary
The present disclosure relates to an integrated chip. The integrated chip includes a source region disposed within a substrate, and a drain region disposed within the substrate and separated from the source region. A plurality of separate isolation structures are disposed within the substrate. The plurality of separate isolation structures have outermost sidewalls that face one another and that are separated from one another. A gate electrode is disposed within the substrate. The gate electrode includes a base region disposed between the source region and the plurality of separate isolation structures and a plurality of gate extensions extending outward from a sidewall of the base region to over the plurality of separate isolation structures.


