Gate Extension Layout for Higher-Voltage LDMOS Breakdown
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Solution Overview
Problem
High voltage transistor devices, such as LDMOS devices, face reduced breakdown voltage due to non-uniform electric fields caused by spikes at the p-n junction between the drift region and the substrate, which affects their performance in applications like RF transmission/receiving chains.
Innovation Solution
The integration of gate extensions laterally protruding from the gate electrode within the substrate helps spread the electric field, reducing surface field crowding and increasing the breakdown voltage by distributing charges along the p-n junction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate electrode structure is used in high voltage transistor devices, then the device structure is simple, but the breakdown voltage is reduced due to non-uniform electric fields and spikes at the p-n junction
Solution Approach 1:
The gate electrode is segmented into a main gate body and multiple gate extensions that protrude laterally into the drift region. This segmentation allows the electric field to be distributed across multiple regions, preventing concentration at single p-n junction points and thereby increasing breakdown voltage while maintaining manageable structural complexity
Solution Approach 2:
The gate extensions extend in a lateral dimension perpendicular to the main current flow direction, creating a multi-dimensional electric field distribution. This dimensional expansion allows charges to be spread along the p-n junction rather than concentrated at a single point, resolving the breakdown voltage limitation without excessive structural complexity
2Reliability
If gate extensions are added to spread the electric field, then the breakdown voltage increases, but the device structure becomes more complex
Solution Approach 1:
Gate extensions are strategically positioned to protrude into specific regions of the drift region where electric field concentration is most problematic. This localized approach targets the critical areas needing field distribution while minimizing unnecessary structural additions, balancing breakdown voltage improvement with controlled device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the breakdown voltage of high voltage transistor devices by mitigating electric field spikes, thereby improving their operational efficiency in high voltage applications.
Implementation Method 1
The plurality of gate extensions are configured to generate an electric field within the drift region, which can laterally spread charges along a p-n junction of the device
Data Source
AI summary
The present disclosure relates to a method of forming an integrated chip. The method includes forming a plurality of isolation structures within a substrate. The substrate is selectively etched to form a gate base recess within the substrate. The plurality of isolation structures are selectively etched to form a plurality of gate extension trenches extending outward from the gate base recess;forming a conductive material within the gate base recess and the plurality of gate extension trenches to form a gate electrode; andforming a source region and a drain region on opposing sides of the gate electrode.