Gate Insulating Film Sequence for Memory-Selection Transistor Boundaries
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing processes for semiconductor devices face challenges in miniaturization due to misalignment issues and thermal load, leading to increased costs and reduced reliability, particularly in forming gate insulating films for different transistors, which can result in leftover films at boundaries and degraded retention characteristics.
Innovation Solution
A method involving sequential formation and selective removal of insulating films on a semiconductor substrate, using techniques like RTO and ISSG oxidation, to create gate insulating films for memory and selection transistors in the same process, reducing the need for expensive ArF excimer laser exposure and minimizing thermal load, thereby improving reliability and cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If ArF excimer laser is used to precisely process the boundary portion, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent uses KrF excimer laser exposure to create a resist pattern that copies the desired boundary portion geometry, then uses this pattern as a mask for selective removal processes. This copying approach achieves precise boundary processing without requiring the more expensive ArF excimer laser equipment.
Solution Approach 2:
The patent introduces a resist film as an intermediary material between the exposure light and the insulating films. The resist film absorbs the KrF excimer laser energy and transfers the pattern information to the underlying insulating films through selective removal, enabling precise boundary processing at lower cost.
2Reliability
If multiple gate insulating films are formed separately for different transistors, then transistor performance is improved, but device complexity increases
Solution Approach 1:
The patent combines the formation of first and second gate insulating films into a single integrated process. By forming both films simultaneously using the same RTO oxidation conditions and using a single resist pattern for selective removal, the patent reduces process complexity while maintaining the performance benefits of having different gate insulating films for different transistor types.
Solution Approach 2:
The patent makes the RTO oxidation process universal by using it to form both the first gate insulating film (for high-withstand-voltage transistors) and the second gate insulating film (for low-withstand-voltage transistors) under the same process conditions. This multi-functional approach simplifies the manufacturing process while maintaining transistor performance.
3Productivity
If RTO method is used to form thick insulating film after thin insulating film, then manufacturing efficiency is improved, but thermal load increases causing retention characteristic degradation
Solution Approach 1:
The patent applies local quality by selectively removing the first gate insulating film only in the memory transistor region using a patterned resist mask. This allows the second gate insulating film to be formed with appropriate thickness locally in the memory transistor region without exposing the entire structure to high-temperature RTO processing, thereby reducing thermal load on the memory transistor while maintaining manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by reducing misalignment errors and thermal degradation, allowing for miniaturization without expensive equipment and processes, while improving the performance of both memory and selection transistors.
Implementation Method 1
the RTO (Rapid Thermal Oxidation) method is used for the process of forming the first insulating film
Implementation Method 2
the ISSG (In-Situ Steam Generation) oxidation method is used for the process of forming a top oxide film of the second insulating film
Data Source
AI summary
A first insulating film is formed on a semiconductor substrate in each of a first region in which a memory transistor is to be formed, a second region in which a selection transistor is to be formed, a third region in which a high-withstand-voltage transistor is to be formed, and a fourth region in which a low-withstand-voltage transistor is to be formed. Subsequently, the first insulating film in each of the first and second regions is removed. A second insulating film is formed on the semiconductor substrate in each of the first and second regions. A third insulating film having a trap level is formed on the second insulating film. The third insulating film in the second region and the second insulating film in the second region are removed. A fourth insulating film is formed on the third insulating film and on the semiconductor substrate in the second region.