Gate-Fin Interface Structure for Smooth Vertical Nanosheet Transistors
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Solution Overview
Problem
Existing technologies face challenges in forming a smooth interface between a dummy gate structure and a fin in non-planar transistor devices, particularly due to the use of semiconductor layers with different materials, which can result in rough interfaces and void formation.
Innovation Solution
The implementation of a connected layer with etching selectivity over the fin structure, which integrates different semiconductor materials and facilitates a smoother interface for the dummy gate structure, thereby enhancing the controllability of the active gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If semiconductor layers with different materials are used to form the fin structure, then the integration density and device performance can be improved, but the interface between the dummy gate structure and the fin becomes rough and voids form
Solution Approach 1:
A connected layer is introduced as an intermediary structure between the fin and the dummy gate structure. This connected layer has etching selectivity that allows it to be differentially etched back, creating a recess that receives the dummy gate structure and forms a smooth interface. The connected layer material acts as a mediator that bridges the interface between different semiconductor materials, preventing void formation while maintaining the benefits of material differentiation for device performance.
2Manufacturing precision
If a connected layer with etching selectivity is introduced, then the interface smoothness and controllability are improved, but the device structure and manufacturing process become more complex
Solution Approach 1:
The connected layer is formed preliminarily before the dummy gate structure is deposited. This preliminary action creates a pre-configured interface structure with the appropriate recess and smooth surfaces, which then simply receives the dummy gate structure. By performing the complex interface preparation work in advance, the subsequent manufacturing steps are simplified, and the overall process becomes more controllable despite the additional initial step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a smoother interface between the gate structure and the fin, reducing void formation and improving the overall performance of the non-planar transistor device by increasing the controllability of the active gate structure.
Implementation Method 1
a connected layer with etching selectivity over the fin structure, which integrates different semiconductor materials
Data Source
AI summary
A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.