Gate-First Semiconductor Structure with Reversed Mandrel Patterns
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving straight gate profiles and self-aligned source/drain structures while minimizing mandrel structure bending and collapse issues, particularly in gate-first processes, which are not as effective as gate-last processes in metal fill and patterning.
Innovation Solution
A gate-first process is implemented that forms mandrel structures with reversed gate patterns, allowing for the use of metal fill process steps similar to gate-last processes, followed by removal of mandrel structures, formation of spacer structures, and self-aligned source/drain structures, thereby achieving straighter gate profiles and reducing mandrel bending concerns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a gate-first process is used to form mandrel structures, then the gate structure can be formed before source-drain structures, but mandrel structure bending and collapse issues occur
Solution Approach 1:
The patent applies inversion by forming mandrel structures with reversed gate patterns instead of conventional gate patterns. This reversal changes the spatial arrangement and structural configuration of the mandrels, allowing them to maintain stability during subsequent processing steps while still enabling the gate-first manufacturing approach. The inverted pattern prevents bending and collapse by distributing structural stress differently across the mandrel array.
Solution Approach 2:
The patent uses preliminary action by pre-forming the mandrel structures with the reversed gate pattern configuration before proceeding with gate structure formation. This preliminary structuring with the inverted pattern establishes a stable framework that resists bending and collapse during subsequent high-aspect-ratio gate etching and metal fill processes, enabling the gate-first approach to proceed without mandrel failure.
2Manufacturing precision
If gate-last process is used for metal fill, then straight gate profiles and self-aligned source/drain structures are achieved, but the gate structure must be formed after source-drain structures
Solution Approach 1:
The patent applies inversion by reversing the gate pattern in the mandrel structures, which enables the gate-first process to achieve the same straight gate profile and self-aligned source/drain structure benefits traditionally associated with gate-last processes. The inverted mandrel configuration provides the necessary structural guidance for precise metal fill and spacer formation, replicating gate-last precision while maintaining gate-first process sequence flexibility.
3Productivity
If mandrel structures with conventional gate patterns are formed, then the process follows traditional gate-first approach, but gate profiles become less straight compared to gate-last processes
Solution Approach 1:
The patent applies inversion by forming mandrel structures with reversed gate patterns instead of conventional patterns. This inversion fundamentally changes how the mandrels guide subsequent processing steps, enabling straight gate profiles to be formed during the gate-first process. The reversed pattern creates optimal structural guidance for metal fill and spacer deposition, achieving gate-last quality gate profiles while maintaining gate-first process sequence flexibility.
Data Source
AI summary
Aspects of the disclosure provide a semiconductor device. The semiconductor device includes a gate structure, a spacer structure and a source/drain structure that are formed on a surface of the semiconductor layer. The gate structure includes a dielectric structure, a metal structure and an insulator structure. The dielectric structure is formed on the surface of the semiconductor layer. A bottom of the metal structure contacts a top of the dielectric structure. The bottom of the insulator structure contacts a top of the metal structure and the insulator structure protrudes over the top of the metal structure. The spacer structure is configured to extend underneath the bottom of the insulator structure and contact a sidewall of the metal structure. The spacer structure is configured to space between the gate structure and the source/drain structure. The source/drain structure includes a source/drain doped structure, a silicide structure and a metal contact plug.