Buried Transistor Gate Groove Compensation for Threshold Stability
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Solution Overview
Problem
The variation in the depth of the gate groove during the fabrication of buried transistors in semiconductor devices can lead to changes in the threshold voltage, affecting the performance and reliability of semiconductor memories.
Innovation Solution
A method is introduced that involves measuring the depth of the gate groove and forming an ion compensation region on the substrate if the depth meets a preset condition, using ion implantation to control the density of charges and compensate for any reduction in threshold voltage, thereby stabilizing the performance of the semiconductor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If ion implantation is completed before gate groove fabrication, then the implantation parameters can be determined in advance, but the threshold voltage varies due to gate groove depth variation, deteriorating transistor performance
Solution Approach 1:
The patent performs preliminary ion implantation to form the active area before gate groove fabrication, which simplifies the manufacturing process. The implantation parameters (ion type, dose, energy) are determined in advance based on design requirements, making the process more efficient and easier to manufacture.
Solution Approach 2:
The patent introduces a feedback mechanism by measuring the actual gate groove depth after fabrication and comparing it with the target depth. Based on this feedback, compensation ion implantation is performed to adjust the threshold voltage and eliminate variations caused by depth deviations, thereby maintaining precise threshold voltage control.
2Device complexity
If gate groove depth is not controlled precisely, then fabrication process is simpler, but threshold voltage varies causing deterioration of semiconductor memory reliability
Solution Approach 1:
The patent implements a feedback-based compensation mechanism where the gate groove depth is measured after fabrication. If the depth deviates from the target value, compensation ion implantation is performed on the active area to adjust the threshold voltage and compensate for the depth variation, thereby maintaining device reliability without requiring extremely precise gate groove fabrication.
Solution Approach 2:
The patent changes the ion implantation parameters (ion type, dose, energy, implantation region) based on the measured gate groove depth. By adjusting these parameters dynamically, the threshold voltage is corrected to compensate for depth variations, ensuring consistent device performance and reliability across different fabrication variations.
3Manufacturing precision
If compensation ion implantation is performed based on gate groove depth measurement, then threshold voltage stability is improved, but the fabrication process becomes more complex
Solution Approach 1:
The patent applies local quality by performing compensation ion implantation selectively on the active area based on the specific depth measurement of each gate groove. The compensation is localized to where it is needed, and the implantation parameters (dose, energy, region) are tailored to the specific requirements of each area, optimizing the threshold voltage stability without uniformly complicating the entire fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively stabilizes the threshold voltage and improves the performance and reliability of semiconductor memory devices by compensating for depth variations in the gate groove, ensuring consistent operation and increased integration density.
Implementation Method 1
performing ion implantation on the substrate to form an active area
Implementation Method 2
forming an ion compensation region in the active area... using ion implantation to control the density of charges and compensate for any reduction in threshold voltage
Data Source
AI summary
Embodiments of the present application provide a semiconductor structure and its fabricating method, and a semiconductor memory. The method of fabricating a semiconductor structure comprises providing a substrate and performing ion implantation on the substrate to form an active area, forming a gate groove on surface of the substrate, measuring depth of the gate groove, and performing ion implantation compensation, if the depth of the gate groove meets a preset condition, on the substrate according to the depth of the gate groove, and forming an ion compensation region in the active area at one side of the gate groove.