Gate Structure Hard Mask for Leakage Prevention

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Solution Overview

Problem

As semiconductor device scaling-down continues, existing manufacturing processes have been inadequate in preventing gate structure leakage and short circuits during etching processes, particularly due to insufficient protection of gate electrode layers.

Innovation Solution

The formation of a hard mask structure with a main portion and extending portions over the gate structure and spacers, which are formed using physical vapor deposition processes, provides sufficient coverage and control to prevent leakage and short circuits by extending onto the upper portions of the spacers but not the bottom portions, allowing precise control of the mask structure's length.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing manufacturing processes are used for gate structure fabrication, then general manufacturing capability is maintained, but gate structure leakage and short circuits occur during etching processes

Engineering Contradiction:
Improvegate structure leakage preventionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

A hard mask structure is formed over the gate structure before etching processes begin. This preliminary protective layer prevents etchant from reaching the gate electrode, thereby preventing leakage and short circuits during subsequent etching operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The hard mask structure serves as an intermediary protective layer between the etchant and the gate electrode. It mediates the etching process by providing a sacrificial barrier that protects the gate structure while allowing the etching to proceed elsewhere.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the hard mask structure extends onto the spacers, then protection coverage is improved, but manufacturing precision is compromised due to difficulty in controlling mask length

Engineering Contradiction:
Improveprotection coverageVSAvoidmask structure length control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The hard mask structure has different extension characteristics on different sides. By controlling the deposition angle and using self-aligned processes, the mask extends precisely onto the spacers where needed while maintaining controlled boundaries, providing local protection exactly where required.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The hard mask structure extends not only in the lateral dimension but also vertically onto the spacers. This three-dimensional configuration provides enhanced protection coverage while the vertical extension onto spacers naturally defines the lateral boundaries, solving the length control issue.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the risk of gate structure leakage and short circuits during subsequent etching processes, improving the yield and uniformity of semiconductor manufacturing by ensuring better protection of gate electrode layers.

Implementation Method 1

The formation of a hard mask structure with a main portion and extending portions over the gate structure and spacers, which are formed using physical vapor deposition processes

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS10840105B2Gate structure with insulating structure and method for manufacturing the same
Publication Date: 2020.11.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10840105B2 patent drawing
  • US10840105B2 patent drawing
  • US10840105B2 patent drawing

AI summary

A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a gate structure over a substrate and forming a spacer on a sidewall of the gate structure. The method for manufacturing a semiconductor structure further includes forming a hard mask structure on a top surface of the gate structure and on an upper portion of the spacer but not on a bottom portion of the spacer.