Fin-Type Gate Line Height Variation for Threshold Voltage Control
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Solution Overview
Problem
As integrated circuit devices are downscaled, reduced gate lengths lead to threshold voltage variations among transistors, affecting performance consistency.
Innovation Solution
The integration of fin-type active areas with varying gate line heights and insulating capping layers, where the combined height of each gate line and capping layer is maintained constant, and the use of fin separating recesses to control stress and threshold voltage distribution across transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor gate length is reduced for downscaling, then device density and integration capacity improve, but threshold voltage variations among transistors increase
Solution Approach 1:
The patent applies local quality by creating different gate line heights at different locations within the transistor structure. Specifically, first gate lines have a first height while second gate lines have a second height different from the first, allowing different regions of the transistor to have optimized characteristics for their specific function, thereby maintaining threshold voltage consistency despite overall device downscaling
Solution Approach 2:
The patent moves from a single-dimensional gate structure to a multi-dimensional structure by varying gate line heights in the vertical dimension. This creates a three-dimensional gate configuration where gate lines extend at different elevations, adding a new degree of freedom for controlling electrical characteristics without increasing planar footprint
2Reliability
If multiple gate lines with different heights are used, then threshold voltage control improves, but device structure complexity increases
Solution Approach 1:
The patent segments the gate structure into multiple independent gate lines (first gate lines and second gate lines) with different heights, allowing each segment to be independently controlled and optimized. This segmentation enables precise threshold voltage control while maintaining manufacturability through standardized fabrication processes
Solution Approach 2:
The multi-height gate line structure serves multiple functions simultaneously: it provides threshold voltage control, enables device scaling, and maintains compatibility with existing semiconductor fabrication processes. The insulating capping layers also serve dual purposes of electrical isolation and structural support
Data Source
AI summary
An integrated circuit device includes a fin-type active area extending on a substrate in a first direction, a first gate line and a second gate line extending on the fin-type active area in parallel to each other in a second direction, which is different from the first direction, a first insulating capping layer covering an upper surface of the first gate line and extending in parallel to the first gate line, a second insulating capping layer covering an upper surface of the second gate line and extending in parallel to the second gate line, wherein a height of the first gate line and a height of the second gate line are different from each other.


