Gate In Panel Circuit Integration for Narrow Bezel Displays
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Solution Overview
Problem
Existing display devices with a gate in panel (GIP) structure face limitations in reducing the bezel width of the non-display area, making it difficult to achieve a narrow bezel width without compromising the aperture ratio.
Innovation Solution
The GIP circuit is integrated into the display area, with thin film transistors placed between adjacent pixels, allowing for the reduction of the non-display area by positioning signal lines and transistors in the boundaries between pixels, thereby decreasing the bezel width without increasing the size of the pixels or lowering the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the GIP circuit is provided in the non-display area, then the gate signal can be supplied to gate lines, but the bezel width cannot be reduced
Solution Approach 1:
The GIP circuit is moved from the non-display area (peripheral region) into the display area (central region), utilizing the space between pixels in a different spatial dimension. This dimensional transition allows the circuit to be integrated without increasing bezel width, as the circuit now occupies space within the display area rather than expanding the peripheral non-display area.
Solution Approach 2:
Thin film transistors are specifically placed in the boundaries between adjacent pixels, utilizing the boundary regions between pixels for circuit functionality. This local placement strategy allows the GIP circuit to be embedded in the display area without interfering with the pixel structure or increasing the overall bezel width.
2Area of stationary object
If thin film transistors are placed between adjacent pixels, then the non-display area is reduced, but the aperture ratio must be maintained
Solution Approach 1:
Thin film transistors are placed specifically in the boundary regions between adjacent pixels, utilizing the inter-pixel spacing that already exists in the display structure. This localized placement ensures that the transistor occupies minimal space and does not encroach on the light-emitting area of pixels, thereby maintaining the aperture ratio while reducing the non-display area.
Solution Approach 2:
The GIP circuit is nested within the display area by embedding thin film transistors in the boundaries between pixels. This nesting approach allows the circuit to be integrated into the existing pixel structure without adding external components, thereby reducing the non-display area while preserving the aperture ratio of individual pixels.
Data Source
AI summary
Disclosed is a display device that may include a GIP circuit, provided on a display area of a substrate, for supplying gate signals to gate lines, wherein the GIP circuit includes a thin film transistor provided in the boundaries between adjacent pixels.