Gate Insulation Layer SUT Process for TFT Substrates
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Solution Overview
Problem
The high-temperature chemical vapor deposition process used in manufacturing thin film transistor substrates limits the selection of base substrates, potentially deforming them and reducing the quality of display devices.
Innovation Solution
A simultaneous ultraviolet ray irradiation and thermal treatment (SUT) process is applied to the gate insulation layer, where ultraviolet rays are irradiated and heat are supplied simultaneously at temperatures between 100° C to 250° C, improving the insulation characteristics and quality of the thin film transistor substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a chemical vapor deposition (CVD) process is used to form thin layers, then the thin layers can be formed, but the base substrate may be deformed or damaged due to relatively high temperature requirements
Solution Approach 1:
The patent replaces the thermal field-based CVD process with a field-based sputtering process. Instead of using high-temperature thermal energy to deposit thin layers, the invention uses electromagnetic field energy (sputtering) to form the gate insulation layer, active layer, and other thin films at low temperatures, thereby avoiding substrate deformation while achieving high-quality thin layer formation
Solution Approach 2:
The patent changes the processing temperature parameter from high temperature (CVD) to low temperature (sputtering). By using sputtering technology, the processing temperature is reduced to below 100°C, fundamentally changing the thermal conditions and eliminating the harmful high-temperature effects on the substrate while maintaining excellent thin layer formation quality
2Manufacturing precision
If a CVD process is used for manufacturing thin film transistor substrates, then thin layers can be formed, but the selection range of base substrates is limited
Solution Approach 1:
The patent replaces the thermally-intensive CVD process with a field-based sputtering process that operates at low temperatures. This substitution enables the use of a broader range of base substrates including plastics and other temperature-sensitive materials that cannot withstand CVD processing temperatures, thereby significantly expanding substrate selection flexibility
Solution Approach 2:
The sputtering process used in the patent has broader applicability across different substrate types compared to CVD. The low-temperature sputtering method can be applied to various base substrates including glass, plastics, and other materials, making the manufacturing process more universal and adaptable to different application requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SUT process enhances the insulation characteristics of the gate insulation layer, improving the overall quality of the thin film transistor and simplifying the manufacturing process by allowing the formation of all layers, including the gate electrode, active pattern, and electrodes, within a sputtering chamber without the need for multiple processing steps.
Implementation Method 1
performing a simultaneous ultraviolet ray irradiation and thermal treatment (SUT) process by irradiating an ultraviolet ray at the gate insulation layer and supplying heat to the gate insulation layer at substantially the same time
Implementation Method 2
supplying heat to the gate insulation layer at substantially the same time
Implementation Method 3
The gate electrode, the gate insulation layer, the active pattern, the source electrode and the drain electrode may be formed by a sputtering process
Data Source
AI summary
A method of manufacturing a thin film transistor substrate may include forming a gate electrode on a base substrate, forming a gate insulation layer on the base substrate, the gate insulation layer covering the gate electrode, performing a simultaneous ultraviolet ray irradiation and thermal treatment (SUT) process by irradiating an ultraviolet ray at the gate insulation layer and supplying heat to the gate insulation layer at substantially the same time, forming an active pattern on the gate insulation layer, the active pattern overlapping the gate electrode, and forming a source electrode and a drain electrode on the gate insulation layer, the source electrode and the drain electrode being electrically connected to the active pattern.


