Multi-Layer Gate Insulator for Display Aperture Ratio and Capacitance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Display devices face a challenge in improving both the aperture ratio and capacitance, as increasing the capacitance of storage capacitors often reduces the aperture ratio, and optimizing the gate insulating material thickness affects the parasitic capacitance and insulation characteristics.

Innovation Solution

The implementation of a thin film transistor with a gate insulating material comprising multiple layers, where the second layer has a thickness between 0.1 to 1.5 times that of the first layer, and the third layer has a thickness between 2 to 12 times that of the second layer, with specific etching selectivities, and a capacitor with a dielectric material that includes the active layer and third layer, allows for enhanced capacitance while maintaining a high aperture ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of gate insulating material is increased to improve insulation characteristics, then insulation performance is improved, but parasitic capacitance increases and aperture ratio decreases

Engineering Contradiction:
Improveinsulation characteristicsVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The gate insulating material is divided into three distinct layers (first layer: silicon nitride, second layer: silicon oxide, third layer: silicon nitride) with specific thickness ratios. This segmentation allows each layer to contribute differently to the overall electrical characteristics, achieving high insulation while controlling parasitic capacitance through the combined effect of multiple materials with different dielectric properties

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a composite structure of different insulating materials (silicon nitride and silicon oxide) in specific layer combinations. The first and third layers use silicon nitride with high dielectric constant for low parasitic capacitance, while the second layer uses silicon oxide for good insulation, creating a composite gate insulating system that balances both requirements

Inventive Principle:
Principle #40Composite materials

2Reliability

If the area of storage capacitor is increased to improve capacitance, then capacitance is improved, but aperture ratio decreases

Engineering Contradiction:
ImprovecapacitanceVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the dielectric parameter of the storage capacitor by using the three-layer gate insulating material structure (with specific thickness ratios and material composition) as the capacitor dielectric. This parameter change in dielectric constant and layer configuration enables higher capacitance density, allowing sufficient capacitance to be achieved in a smaller area, thus maintaining high aperture ratio

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If the thickness of gate insulating material is optimized to reduce parasitic capacitance, then parasitic capacitance is reduced, but insulation characteristics deteriorate

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidinsulation characteristics
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

Different regions of the gate insulating structure have different local qualities - the first and third layers (silicon nitride) provide low parasitic capacitance at the interfaces with electrodes, while the second layer (silicon oxide) provides strong insulation in the middle region. This local optimization of material properties at different positions achieves both low parasitic capacitance and high insulation characteristics simultaneously

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8988640B2Display device and fabrication method of the same
Publication Date: 2015.03.24 SAMSUNG DISPLAY CO LTD
  • US8988640B2 patent drawing
  • US8988640B2 patent drawing
  • US8988640B2 patent drawing

AI summary

The embodiment relates to a display device having an improved aperture ratio and capacitance, and a fabrication method of the display device, in which the display device may include a thin film transistor, which includes: an active layer, a gate electrode, a source electrode electrically connected to the active layer, a drain electrode electrically connected to the active layer, and a gate insulating material formed between the active layer and the gate electrode, where the gate insulating material includes a first layer, a second layer and a third layer, where the second layer has a thickness between about 0.1 to about 1.5 times a thickness of the first layer, and where the third layer has a thickness between about 2 to about 12 times the thickness of the second layer.