Semiconductor Gate Interface Thinning with Metal Silicate Conversion
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Solution Overview
Problem
The scaling down of feature sizes in integrated circuit (IC) chips leads to quality issues in the interfacial layer between the silicon channel and gate dielectric, causing defects, poor uniformity, and increased trap density, which adversely affect device performance and production yield.
Innovation Solution
A method involving the formation of interfacial features through surface oxidation, deposition of a metal oxide layer, and conversion to a metal silicate layer followed by removal, resulting in a thinner, more robust interfacial layer with reduced equivalent oxide thickness (EOT) and improved uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are scaled down to increase functional density, then the number of semiconductor devices per chip area increases, but the interfacial layer quality deteriorates with more defects
Solution Approach 1:
A thin aluminum oxide layer is deposited on the silicon channel surface before forming the interfacial layer. This preliminary action prevents direct contact between the silicon and the interfacial layer materials, thereby preventing defect formation and maintaining high interfacial layer quality even as feature sizes are scaled down to increase functional density.
2Productivity
If interfacial layer thickness is reduced to decrease equivalent oxide thickness, then gate leakage current increases, but device performance improves
Solution Approach 1:
A thin aluminum oxide layer is introduced as an intermediary between the silicon channel and the interfacial layer. This intermediary layer allows the interfacial layer to be made thinner to reduce equivalent oxide thickness and improve device performance, while the aluminum oxide layer prevents direct silicon-interfacial layer contact that would cause gate leakage, thus eliminating the harmful effect.
3Ease of manufacture
If conventional interfacial layer formation is used to simplify manufacturing, then production cost is reduced, but interfacial layer uniformity deteriorates
Solution Approach 1:
The thin aluminum oxide layer is deposited beforehand using atomic layer deposition (ALD) to create a highly uniform base layer. This preliminary uniform layer serves as a template that guides subsequent interfacial layer formation, ensuring that the final interfacial layer maintains high uniformity even though the manufacturing process becomes slightly more complex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces interfacial layer defects, enhances uniformity, and decreases gate leakage current, thereby improving the quality and performance of semiconductor devices.
Implementation Method 1
forming an interfacial material layer to cover the plurality of channel features
Implementation Method 2
forming a metal oxide layer on the interfacial material layer
Implementation Method 3
subjecting the interfacial material layer and the metal oxide layer to thermal treatment, so as to form a metal silicate layer
Data Source
AI summary
A method for manufacturing a semiconductor device includes: forming a semiconductor structure on a semiconductor substrate, the semiconductor structure including first and second source/drain regions disposed on the semiconductor substrate in a first direction and spaced apart from each other in a second direction transverse to the first direction, and a plurality of channel features disposed between and connected to the first and second source/drain regions and spaced apart from one another in the first direction; forming an interfacial material layer to cover the channel features; forming a metal oxide layer on the interfacial material layer; converting a portion of the interfacial material layer into a metal silicate layer so as to form a plurality of interfacial features respectively covering the channel features, the metal silicate layer being formed between the metal oxide layer and the interfacial features; and removing the metal oxide layer and the metal silicate layer.