Gate Isolation Structure for Leakage and Extrusion Defect Control
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Solution Overview
Problem
The continuous scaling down of semiconductor device dimensions and increasing demand for higher performance lead to challenges such as sloped fin structures, increased metal gate extrusion defects, and source/drain epitaxial pit defects, which affect gate control and leakage current in semiconductor devices.
Innovation Solution
A method is introduced to form a second isolation layer surrounding the gate structure, specifically the gate footing portion, to reduce metal gate extrusion defects and source/drain epitaxial pit defects, by depositing a dielectric material using flowable chemical vapor deposition, which improves gate control and reduces leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the dimensions of semiconductor devices are scaled down to increase storage capacity and processing speed, then higher performance and lower costs are achieved, but the complexity of manufacturing processes increases and process control becomes more difficult
Solution Approach 1:
The gate structure is divided into two distinct portions: a first portion with a first width and a second portion with a second width greater than the first width. This segmentation allows different regions of the gate to serve different functions, improving process control during scaling while maintaining high performance
2Reliability
If the gate structure is designed with a wider bottom portion (gate footing) to improve gate control, then leakage current is reduced, but metal gate extrusion defects and source/drain epitaxial pit defects increase
Solution Approach 1:
The gate structure implements local quality by having different widths at different portions: the first portion has a first width optimized for gate control, while the second portion has a greater second width to prevent defects during manufacturing. This local differentiation resolves the contradiction between reliability and manufacturing precision
3Productivity
If continuous scaling is pursued to meet demand for higher performance, then device density increases, but sloped fin structures and process control difficulties worsen
Solution Approach 1:
By segmenting the gate structure into two portions with different widths, the invention enables better control over fin structure formation during scaling. The differentiated gate portions provide better process control while maintaining high device density through continued scaling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The second isolation layer effectively decreases metal gate extrusion defects and source/drain epitaxial pit defects, enhancing gate control and reducing leakage current in semiconductor devices, thereby improving device performance and reliability.
Implementation Method 1
depositing a dielectric material using flowable chemical vapor deposition
Data Source
AI summary
The present disclosure describes forming a semiconductor structure having an isolation layer surrounding a portion of a gate structure. The semiconductor structure includes a channel structure on a substrate, a first isolation layer on the substrate and surrounding the channel structure, and a gate structure on the channel structure and the first isolation layer. The gate structure includes a first portion having a first width and a second portion having a second width less than the first width. The semiconductor structure further includes a second isolation layer on the first isolation layer and surrounding the first portion of the gate structure.