Gate Last Process Stopping Structures for CMP Damage Prevention
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Solution Overview
Problem
The integration of a gate last process with junction device layouts and resistor device layouts is challenging due to issues such as over-polishing and damage during chemical mechanical polishing (CMP) in semiconductor fabrication, particularly affecting bipolar junction transistors (BJTs) and passive devices like resistors, leading to poor device performance or failure.
Innovation Solution
The implementation of a polishing stopping structure and a contact stopping structure, formed in the same process as the gate structures, to prevent over-polishing and damage during the CMP process, ensuring the integrity of active regions and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate last process is implemented to form metal gate structures after source/drain formation, then device performance is improved, but over-polishing and damage occur during CMP process affecting junction devices and passive devices
Solution Approach 1:
A stopping structure is introduced as an intermediary element between the isolation structure and the CMP process. This stopping structure serves as a protective mediator that absorbs or prevents the harmful polishing action from reaching the underlying junction devices and passive devices, thereby resolving the contradiction between achieving good device performance through gate last process and preventing CMP-induced damage
2Manufacturing precision
If polishing stopping structures and contact stopping structures are added to prevent over-polishing, then device integrity is improved, but process complexity increases
Solution Approach 1:
The formation of stopping structures is merged with the existing gate structure formation process. By integrating these protective structures into the same fabrication sequence as the metal gates, the patent avoids adding separate dedicated process steps, thereby minimizing the increase in process complexity while still achieving the benefit of preventing over-polishing damage
Data Source
AI summary
A semiconductor device is provided that includes a semiconductor substrate having a first region and a second region, transistors having metal gates formed in the first region, an isolation structure formed in the second region, at least one junction device formed proximate the isolation structure in the second region, and a stopping structure formed overlying the isolation structure in the second region.