Gate Layer Wrap-Around Compensation for Flash Memory Current Stability
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Solution Overview
Problem
The variation in floating gate thickness across wafers leads to significant variations in the reading current of split-gate Flash bitcells, affecting the reliability of digital data storage, and traditional compensation methods like source/drain pocket implantation negatively impact programming efficiency.
Innovation Solution
A feed-forward method is implemented to dynamically adjust the etch time of shallow trench isolation structures based on measured floating gate thickness variations, increasing the wrap-around area of the word line gate layer to compensate for these variations, thereby stabilizing the reading current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional source/drain pocket implantation is used to compensate for floating gate thickness variation, then reading current variation is reduced, but programming efficiency deteriorates
Solution Approach 1:
The patent implements a feed-forward control method where floating gate thickness is measured early in the fabrication process, and etch time parameters are adjusted in advance before the programming step. This preliminary adjustment of etch parameters compensates for thickness variations without requiring post-fabrication implantation, thus maintaining programming efficiency while achieving reading current consistency.
Solution Approach 2:
The patent changes the etch time parameter of the shallow trench isolation structures based on measured floating gate thickness variations. By dynamically adjusting this process parameter, the system compensates for thickness variations and stabilizes reading current without introducing additional implantation steps that would reduce programming efficiency.
2Quantity of substance
If floating gate thickness is increased to improve storage capacity, then more data can be stored, but reading current variation increases
Solution Approach 1:
The patent implements a feedback control loop where floating gate thickness is measured after deposition, and the measured values are used to adjust subsequent etch process parameters. This closed-loop control compensates for thickness variations, ensuring that even when floating gate thickness varies to accommodate different storage capacities, the reading current remains consistent through parameter adjustment.
Data Source
AI summary
In accordance with some examples, a system comprises a substrate layer having an outer surface. The system also comprises a plurality of trenches extending from the outer surface into the substrate layer. The system then comprises a plurality of active regions with each active region positioned between a different pair of consecutive trenches of the plurality of trenches. The system also comprises a dielectric layer disposed in each of the plurality of trenches and on each of the plurality of active regions. The system then comprises a gate layer disposed on the dielectric layer and extending at least partially into each of the plurality of trenches.


