Gate Structure Layout for Transistors With Different Junction Depths
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Solution Overview
Problem
Existing semiconductor device manufacturing methods are limited in achieving transistors with different junction depths, which restricts further scaling down of the semiconductor device footprint.
Innovation Solution
The method involves forming first and second shallow trench isolation trenches in a substrate, with first and second bottom isolation layers having different thicknesses, and constructing first and second gate structures that extend along the sidewalls of the active areas onto these isolation layers, allowing for transistors with varying junction depths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a shallow trench isolation structure is fabricated on an active area with a uniform gate formation process, then the manufacturing process is simple and uniform, but all transistors obtain the same junction depth which limits further scaling down the footprint
Solution Approach 1:
The patent applies local quality by forming different thicknesses of bottom isolation layers in different regions of the semiconductor device. Specifically, a first bottom isolation layer with a first thickness is formed in a first region, while a second bottom isolation layer with a second thickness (different from the first) is formed in a second region. This allows transistors in different regions to have different junction depths, enabling diverse transistor characteristics within the same device without complicating the overall manufacturing process.
2Area of stationary object
If transistors with different junction depths are achieved, then the footprint of the semiconductor device can be reduced, but the manufacturing process complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the semiconductor device into multiple regions (first region and second region) with different bottom isolation layer thicknesses. This segmentation allows independent optimization of transistor characteristics in different areas, enabling footprint reduction through varied junction depths while managing manufacturing complexity through a structured, region-based approach rather than a completely complex process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of transistors with different junction depths while minimizing the semiconductor device footprint, thereby overcoming the limitations of existing methods.
Implementation Method 1
spin-coating isolating material onto the bottom of first shallow trench isolation trench and onto the bottom of the second shallow trench isolation trench
Data Source
AI summary
A semiconductor device and a method of fabricating the semiconductor device are provided. The method includes: forming a first bottom isolation layer and a second bottom isolation layer in a substrate, the thickness of the second bottom isolation layer being less than that of the first bottom isolation layer; and forming, on the a first active area in the substrate, a first gate structure extending to the first bottom isolation layer and forming, on a second active area in the substrate, a second gate structure extending to the second bottom isolation layer.