Semiconductor Gate Layout for Slip-Free Temperature Detection
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Solution Overview
Problem
Semiconductor devices with temperature detectors often experience slip or crystal defects during heat treatment, affecting their properties and reducing the non-defect ratio.
Innovation Solution
A semiconductor device configuration that includes a drift layer of a first conductivity-type, a base region of a second conductivity-type, a main region of the first conductivity-type, a first gate electrode buried in a trench with a gate insulating film, a well region of the second conductivity-type, and a temperature detector with a second gate electrode buried in a trench under the temperature detector, all with a gate insulating film interposed, to prevent stress concentration and slip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a temperature detector is provided on the well region, then temperature sensing function is achieved, but slip and crystal defects occur during heat treatment
Solution Approach 1:
The gate electrode is divided into two separate gate electrodes: a first gate electrode formed on the main region and a second gate electrode formed on the well region. This segmentation allows the second gate electrode to specifically protect the well region and temperature detector from slip during heat treatment, while the first gate electrode maintains the primary device function. The segmentation resolves the contradiction by providing localized protection where needed without compromising overall device performance.
Solution Approach 2:
The second gate electrode is formed preliminarily on the well region before heat treatment processes. This preliminary structure serves as a protective element that prevents slip and crystal defects from occurring during subsequent heat treatment. By establishing this protective structure in advance, the patent prevents the harmful effects of heat treatment on the temperature detector and well region.
2Manufacturing precision
If heat treatment is performed during manufacturing, then device properties are optimized, but slip occurs around the temperature detector
Solution Approach 1:
The second gate electrode acts as a cushioning structure formed beforehand on the well region. During heat treatment, this preliminary structure absorbs and distributes thermal stress, preventing concentration of stress that would cause slip. The gate insulating film between the second gate electrode and the well region provides additional stress distribution, cushioning the underlying crystal structure from harmful stress concentration during thermal processing.
Solution Approach 2:
The gate insulating film serves as an intermediary layer between the second gate electrode and the well region. This intermediate structure mediates the stress distribution during heat treatment, preventing direct stress concentration on the well region and temperature detector. The insulating film allows the second gate electrode to provide protective stress distribution while maintaining electrical isolation, thus enabling heat treatment without causing slip.
3Device complexity
If the well region is exposed on the top surface, then device structure is simplified, but stress concentration occurs during heat treatment
Solution Approach 1:
The patent applies local quality by providing the second gate electrode specifically on the well region where stress concentration occurs during heat treatment, rather than uniformly across the entire device. This localized structure provides stress distribution precisely where needed, maintaining the simplified overall device architecture while addressing the specific stress problem in the well region. The local addition of the second gate electrode and gate insulating film does not significantly increase overall device complexity.
Data Source
AI summary
A semiconductor device includes: a drift layer of a first conductivity-type; a base region of a second conductivity-type provided on a top surface side of the drift layer; a main region of the first conductivity-type provided on a top surface side of the base region; a first gate electrode buried in a first trench in contact with the main region and the base region with a gate insulating film interposed; a well region of the second conductivity-type provided on the top surface side of the drift layer; a temperature detector provided on a top surface side of the well region with an insulating film interposed; and a second gate electrode buried in a second trench provided in the well region and at least partly located immediately under the temperature detector with the gate insulating film interposed.