Semiconductor Gate Lengths via Amorphous Silicon Etch
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor manufacturing faces challenges in achieving multiple gate lengths on a single wafer without altering or reordering lithography masks, which increases complexity, costs, and fabrication times.
Innovation Solution
The method involves forming gate structures with different critical dimensions using amorphous silicon and polysilicon, exploiting differences in etch behavior to modulate undercut/lateral erosion, allowing for multiple gate lengths without altering the lithography mask, through etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple gate lengths are achieved by altering or reordering lithography masks, then different critical dimensions can be obtained, but mask complexity, fabrication time, and costs increase
Solution Approach 1:
The patent changes the material parameter of the gate structure from uniform polysilicon to a composite structure with amorphous silicon and polysilicon regions. This material parameter change causes different etch rates during the etching process, which in turn produces different critical dimensions for the gate structures without requiring mask alterations. The amorphous silicon etches at a different rate than polysilicon, naturally creating the desired critical dimension variation
Solution Approach 2:
The patent replaces the mechanical/lithographic approach (altering masks to change patterns) with a chemical/etching approach. Instead of using different mask patterns or reordering masks, the invention uses selective etching of amorphous silicon versus polysilicon materials to achieve the critical dimension differences. This substitution eliminates the need for mask rework while achieving the same functional result
2Manufacturing precision
If multiple gate lengths are achieved by altering or reordering lithography masks, then different critical dimensions can be obtained, but mask complexity and costs increase
Solution Approach 1:
The patent changes the material parameter of the gate structure from uniform polysilicon to a composite structure with amorphous silicon and polysilicon regions. This material parameter change causes different etch rates during the etching process, which in turn produces different critical dimensions for the gate structures without requiring mask alterations. The amorphous silicon etches at a different rate than polysilicon, naturally creating the desired critical dimension variation
Solution Approach 2:
The patent replaces the mechanical/lithographic approach (altering masks to change patterns) with a chemical/etching approach. Instead of using different mask patterns or reordering masks, the invention uses selective etching of amorphous silicon versus polysilicon materials to achieve the critical dimension differences. This substitution eliminates the need for mask rework while achieving the same functional result
3Manufacturing precision
If amorphous silicon and polysilicon are used with different etch behavior, then critical dimension differences can be achieved through etching, but additional processing steps are required
Solution Approach 1:
The patent performs preliminary action by forming amorphous silicon in specific regions before the etching process. The amorphous silicon is deposited and patterned in advance, creating the material distribution that will later be selectively etched. This preliminary material preparation enables the subsequent etching process to automatically produce the desired critical dimension variations without requiring complex real-time control during etching
Solution Approach 2:
The patent changes the material parameter of the gate structure from uniform polysilicon to a composite structure with amorphous silicon and polysilicon regions. This material parameter change causes different etch rates during the etching process, which in turn produces different critical dimensions for the gate structures without requiring mask alterations. The amorphous silicon etches at a different rate than polysilicon, naturally creating the desired critical dimension variation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces Optical Proximity Correction mask complexity, eliminates the need to reorder masks, and lowers fabrication costs by achieving critical dimension differences through etching rather than lithography, enabling efficient production of semiconductor devices with varied gate lengths.
Implementation Method 1
exploiting differences in etch behavior to modulate undercut/lateral erosion
Implementation Method 2
exploiting differences in etch behavior to modulate undercut/lateral erosion
Data Source
AI summary
Gate structures with different gate lengths and methods of manufacture are disclosed. The method includes forming a first gate structure with a first critical dimension, using a pattern of a mask. The method further includes forming a second gate structure with a second critical dimension, different than the first critical dimension of the first gate structure, using the pattern of the mask.