Gate-Level Information Flow Security via Symbolic Simulation
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Solution Overview
Problem
IoT systems face significant security and privacy risks due to their interconnected nature, with existing gate-level information flow security approaches being costly and restrictive, making them unsuitable for ultra-low-power and cost-constrained devices like wearables and sensor nodes.
Innovation Solution
A software tool that performs gate-level information flow tracking on commodity hardware without hardware design changes, using symbolic simulation to identify and prevent information flow violations, allowing for selective application of security measures only where needed, thereby reducing overhead and maintaining security guarantees.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate-level information flow tracking is implemented using traditional hardware approaches, then information flow security is improved, but device cost and complexity increase significantly
Solution Approach 1:
The patent replaces the mechanical/hardware-based information flow tracking system with a software-based simulation approach. Instead of physically modifying hardware gates with tracking logic, the invention uses symbolic simulation to model and analyze information flows at the gate level, thereby maintaining security analysis capabilities while eliminating hardware complexity and cost.
Solution Approach 2:
The patent creates a symbolic copy or model of the hardware system's gate-level behavior without physically replicating the hardware. The symbolic simulation generates a virtual representation of the circuit's information flow characteristics, allowing security analysis to be performed on this model rather than requiring actual hardware modifications.
2Reliability
If gate-level information flow tracking is implemented using traditional hardware approaches, then information flow security is improved, but device area and power consumption increase
Solution Approach 1:
The patent substitutes physical hardware modifications with software-based symbolic simulation, eliminating the need for additional physical gates and logic elements that would increase device area. The analysis is performed virtually rather than through physical expansion of the circuit.
3Reliability
If gate-level information flow tracking is implemented using traditional hardware approaches, then information flow security is improved, but manufacturing cost increases
Solution Approach 1:
The patent uses symbolic copying to create a virtual model of the hardware system for analysis purposes. This allows comprehensive gate-level security verification to be performed through software simulation rather than requiring expensive hardware prototypes or specialized manufacturing processes.
Solution Approach 2:
The patent replaces costly hardware-based security implementation with software-based symbolic simulation, significantly reducing manufacturing costs while maintaining the ability to perform thorough gate-level information flow analysis.
4Reliability
If gate-level information flow tracking is implemented using traditional hardware approaches, then information flow security is improved, but programmability and performance are restricted
Solution Approach 1:
The patent replaces restrictive hardware-based tracking with flexible software-based symbolic simulation. This allows the security analysis tool to adapt to different applications and hardware configurations without requiring physical reconfiguration, maintaining full programmability while enabling gate-level security verification.
Data Source
AI summary
A method includes receiving a processor design of a processor, receiving an application to be executed by the processor, and receiving a security policy. The method includes simulating the execution of the application on the processor to identify information flow violations generated by the application based on the security policy.